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149 articles for “gate”
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Research ArticleOpen accessEvery word in the titleA Novel Fault-Tolerant Majority Gate Architecture for Robust Operation in QCA-Based Nano CircuitsAmi Patel, Vrushank Shah, Dipti KhurgeQuantum Dot Cellular Automata (QCA) is one of the promising alternatives to the traditional CMOS technologies for next-generation nanocomputing, which can be integrated at a higher density and has a higher possibility of low power consumption. Fabrication defects, environmental noise, and fault tolerance, especially in larger circuits, are challenging for practical implementation of QCA circuits. A new Fault-Tolerant Majority Gate … …Journal of Computer Science, Vol. 22, Issue 7 · 7 Jul 2026 · 1,194 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleIdentification of Multi-Cracks in the Gate Rotor Shaft Based on the Wavelet Finite Element MethodBin ZhaoIn order to have fault identification for the gate rotor shaft with multiple cracks effectively, the quantity identification method of the gate rotor shaft with multiple cracks based on wavelet finite element method is established and the frequency test of the gate rotor shaft based on blind source separation algorithm is analyzed. Firstly the wavelet finite element was established by … …American Journal of Engineering and Applied Sciences, Vol. 6, Issue 3 · 12 Sep 2013 · 7,270 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleHardware Modeling of Binary Coded Decimal Adder in Field Programmable Gate ArrayMuhammad Ibn Ibrahimy, Rezwanul Ahsan, Iksannurazmi Bambang SoerosoThere are insignificant relevant research works available which are involved with the Field Programmable Gate Array (FPGA) based hardware implementation of Binary Coded Decimal (BCD) adder. This is because, the FPGA based hardware realization is quiet new and still developing field of research. The article illustrates the design and hardware modeling of a BCD adder. Among the types of adders, … …American Journal of Applied Sciences, Vol. 10, Issue 5 · 28 May 2013 · 6,512 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleGate Replacement Technique for Reducing Leakage Current in Wallace Tree MultiplierNaveen Raman, ThanushkodiLeakage power has become more significant in the power dissipation of today’s CMOS circuits. This affects the portable battery operated devices directly. The multipliers are the main key for designing an energy efficient processor, where the multiplier design decides the digital signal processors efficiency. In this study gate replacement technique is used to reduce the leakage power in 4×4 Wallace … …Journal of Computer Science, Vol. 9, Issue 2 · 30 Mar 2013 · 6,763 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleDesign of Field Programmable Gate Array Based Emulators for Motor Control ApplicationsAhmed Ben Achballah, Slim Ben Othman, Slim Ben SaoudProblem statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important time consuming stage in a design flow. High Level Synthesis technique avoids this bottleneck and increases design productivity as witnessed by industry specialists. Approach: This study proposes to … …American Journal of Applied Sciences, Vol. 9, Issue 8 · 12 Jun 2012 · 8,723 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,677 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleField Programmable Gate Arrays Based Realization of Truncated MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Due to high cost and non reconfiguration of Application Specific Integrated Circuits (ASICs) in image processing applications, for example MPEG video compression used in CT scan frames requires real time conditions and the algorithms should be verified and optimized before implementation. Approach: Field Programmable Gate Array (FPGA) provides reconfiguration and implementation at the same time. Results: The implementation … …American Journal of Applied Sciences, Vol. 8, Issue 7 · 24 Jun 2011 · 6,694 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,123 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleQuantum Hadamard Gate Implementation Using Planar Lightwave Circuit and Photonic Crystal StructuresShamsolah Salemian, Shahram MohammadnejadAn all optical method has been proposed for quantum Hadamard gate implementation. This quantum gate was realized by using Y-junction beam splitter. Normal modes in waveguides have been used as quantum bit. This all optical gate can be used in quantum computation and communication. The proposed Hadamard gate has potential of being more compact and easily realized compared to other … …American Journal of Applied Sciences, Vol. 5, Issue 9 · 30 Sep 2008 · 7,921 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleA Novel Fault Tolerant Reversible Gate For Nanotechnology Based SystemsMajid Haghparast, Keivan NaviThis paper proposes a novel reversible logic gate, NFT. It is a parity preserving reversible logic gate, that is, the parity of the outputs matches that of the inputs. We demonstrate that the NFT gate can implement all Boolean functions. It renders a wide class of circuit faults readily detectable at the circuit's outputs. The proposed parity preserving reversible gate, … …American Journal of Applied Sciences, Vol. 5, Issue 5 · 31 May 2008 · 7,904 accessesView PDFCite