Author

Keivan Navi

5 articles in our journals

Articles where this person is an author, newest first. People are matched by their name as printed (no ORCID iD is recorded for them), not by name alone; search the name as text to find namesakes too.

Research ArticleOpen accessA Novel Fault Tolerant Reversible Gate For Nanotechnology Based SystemsMajid Haghparast, Keivan NaviThis paper proposes a novel reversible logic gate, NFT. It is a parity preserving reversible logic gate, that is, the parity of the outputs matches that of the inputs. We demonstrate that the NFT gate can implement all Boolean functions. It renders a wide class of circuit faults readily detectable at the circuit's outputs. The proposed parity preserving reversible gate, … …American Journal of Applied Sciences, Vol. 5, Issue 5 · 31 May 2008 · 7,904 accessesView PDF Cite

Research ArticleOpen accessLow Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number SystemSomayeh Timarchi, Omid Kavehei, Keivan NaviModulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the … …American Journal of Applied Sciences, Vol. 5, Issue 4 · 30 Apr 2008 · 7,561 accessesView PDF Cite

Research ArticleOpen accessA Novel Reversible BCD Adder For Nanotechnology Based SystemsMajid Haghparast, Keivan NaviThis paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as &#34Copying Circuit&#34 to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all … …American Journal of Applied Sciences, Vol. 5, Issue 3 · 31 Mar 2008 · 10,135 accessesView PDF Cite

Research ArticleOpen accessMinimization of Multiple-Valued Decision Diagrams Based on Matrix ComputationOmid Kavehie, Keivan Navi, Ebrahim Afjei, Hamid KhorsandThis paper proposes a new algorithm to simplify the multiple valued logic (MVL) decision diagrams. This algorithm is based on a new level coupling rule. By changing the designer’s perspective towards the design, this rule can make further simplification possible. In most of state of the art designs, the decision diagram plays a serious role in the implementation of the … …American Journal of Applied Sciences, Vol. 5, Issue 2 · 28 Feb 2008 · 6,930 accessesView PDF Cite

Research ArticleOpen accessA Novel High-Speed 54⨯54 bit MultiplierPouya Asadi, Keivan NaviA new 54⨯54-bit multiplier using high-speed carry-lookahead adder has been fabricated by CMOS technology. This paper presents a self-timed carry-lookahead adder in which the logic complexity was a linear function of n, the number of inputs, and the average computation time was proportional to the logarithm of the logarithm of n. To the best of our knowledge, our adder has … …American Journal of Applied Sciences, Vol. 4, Issue 9 · 30 Sep 2007 · 7,083 accessesView PDF Cite