2 results for “carry save adder”

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Research ArticleOpen accessEvery word in the titleLow Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number SystemSomayeh Timarchi, Omid Kavehei, Keivan NaviModulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the … …American Journal of Applied Sciences, Vol. 5, Issue 4 · 30 Apr 2008 · 7,561 accessesView PDF Cite

Research ArticleOpen accessIn the keywordsEfficient Reversible Montgomery Multiplier and Its Application to Hardware CryptographyNoor Muhammed Nayeem, Lafifa Jamal, Hafiz Md. Hasan BabuProblem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not … …Journal of Computer Science, Vol. 5, Issue 1 · 31 Jan 2009 · 7,852 accessesView PDF Cite