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10 results for “analog-to-digital converter”
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Research ArticleOpen accessPhrase in the titleDesign of Multi-Valued Quaternary Based Analog-to-Digital ConverterA.H.M. Zahirul Alam, Wahab Adetunji Lawal, Sheroz Khan, Muhammad Mahbubur RashidProblem statement: The design of multi-valued quaternary based Analog-to-Digital Converter (ADC) circuit was presented. The ADC generates multi-valued logic outputs rather than the conventional binary output system to overall reduction in circuit complexity and size. Approach: Design was implemented using pipeline ADC architecture and was simulated using model parameters based on standard 0.13 µm CMOS process. Results: Performance analysis of … …American Journal of Applied Sciences, Vol. 6, Issue 8 · 31 Aug 2009 · 7,291 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleA Novel Method for Testing Digital to Analog Converter in Static RangeK. Hariharan, S. Gouthamraj, B. Subramaniam et al.Problem statement: Linearity testing methods for DAC usually involves usage of non-linear analog components, which are indeed prone to various errors. Few other testing methodologies involve complex circuitry for measuring exactitude of DAC. Practically, it is difficult to build those as Built In Self Test (BIST) due to complexity of calculation, which demands more usage of ALU (or core of … …American Journal of Applied Sciences, Vol. 7, Issue 8 · 31 Aug 2010 · 7,458 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA 10GHZ Low-Offset Dynamic Comparator for High-Speed and Lower-Power ADCSBakoune Pierre Hypolite, Wembe Tafo Evariste, Moukengue Imano AdolpheThis paper proposed a design of low-voltage Dynamic Comparator using 90 nm PTM CMOS technology for high-speed and Lower-power Analog to Digital Converter (ADC) applications. The double tail structure is employed as based for design new comparator with positive feedback due to best behavior in low-voltage that allows low delay time; decreases the offset voltage and power dissipation. Simulation results … …American Journal of Engineering and Applied Sciences, Vol. 12, Issue 2 · 6 May 2019 · 7,671 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA Dual-Slope Integration Based Analog-to-Digital ConvertorHasan KradProblem statement: With the advent of the advanced technology and the need for more advanced equipment, the current progress and development of electronic instruments stimulate more interest and efforts for more innovative ideas and better designs. Many real world physical values, such as sounds, temperature, pressure and humidity, can be measured as analog or continuous signals. However, to process these … …American Journal of Engineering and Applied Sciences, Vol. 2, Issue 4 · 31 Dec 2009 · 7,796 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA new Logic ConverterDr. Amer Abu-Alispecial design for analog voltage-to-4 valued logic converter is implemented. In this study 2-bits converter was developed and tested using PLA (Programmable Logic Arrays) and two Digital-to-Analog converters. …American Journal of Applied Sciences, Vol. 3, Issue 2 · 28 Feb 2006 · 6,625 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Implementation of an Optimal Fuzzy Logic Controller Using Genetic AlgorithmS. Khan, S. F. Abdulazeez, L. W. Adetunji et al.All control systems suffer from problems related to undesirable overshoot, longer settling times and vibrations while going form one state to another state. Most of relevant techniques had been in the form of suggesting modification and improvement in the instrumentation or interfacing part of the control system and the results reported, remain suffering from shortcomings related to hardware parameter dependence … …Journal of Computer Science, Vol. 4, Issue 10 · 31 Oct 2008 · 8,049 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Wireless Sensor Node Supporting Various Powers Supply and Communication MethodsStefan Gruber, Hannes Reinisch, Hartwig Unterassinger et al.Problem statement: This study presents a wireless sensor node dedicated for in-tire pressure and temperature monitoring. Additional features set it apart from the many different systems available on the highly competitive market. State-of-the-art implementations are mounted on the rim of a tire. Here the sensor node will be mounted on the inner liner of the tire. By moving the sensor … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 4 · 12 Jan 2012 · 8,032 accessesView PDFCite
Research ArticleOpen accessIn the abstractVLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless ReceiversRozita Teymourzadeh, Yazan Samir Algnabi, Masuri Othman et al.Problem statement: The need for high performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize latest technique identified as over sampling systems. It was the most economical modulator and decimation in communication system. It has been proven to increase the SNR and is used in many high performance systems such as in the … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 5 Nov 2010 · 7,815 accessesView PDFCite
Research ArticleOpen accessIn the abstractHardware Implementation of a Genetic Algorithm Based Canonical Singed Digit Multiplierless Fast Fourier Transform Processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband ApplicationsMahmud Benhamid, Masuri B. OthmanProblem statement: Ultra Wide Band (UWB) technology has attracted many researchers' attention due to its advantages and its great potential for future applications. The physical layer standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB system is defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 … …Journal of Mathematics and Statistics, Vol. 5, Issue 4 · 31 Dec 2009 · 7,515 accessesView PDFCite
Research ArticleOpen accessIn the abstractA New Efficient-Silicon Area MDAC SynapseZied Gafsi, Nejib Hassen, Mongia Mhiri, Kamel BesbesUsing the binary representation ΣiDi2i in the Multiplier digital to analog converter (MDAC) synapse designs have crucial drawbacks. Silicon area of transistors, constituting the MDAC circuit, increases exponentially according to the number of bits. This latter is generated by geometric progression of common ratio equal to 2. To reduce this exponential increase to a linear growth, a new synapse named … …American Journal of Applied Sciences, Vol. 4, Issue 6 · 30 Jun 2007 · 7,158 accessesView PDFCite