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3 results for “DNL”

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Research ArticleOpen accessIn the keywordsModelling of Digital Assisted Backend Correction Analogue to Digital Converters with Verilog-AGong Yuehong, Luo Min, Ma JianguoProblem statement: Pipelined architecture is considered to be the most suitable for high-speed and high-resolution applications among varies Nyquist Analogue to Digital Converters (ADCs) in nowadays digital signal processing domain. But the pipeline power consumption is growing with the technology scaling. For a pipeline ADC with high speed and high resolution, the fore-end track and hold amplifier and residual amplifier … …Current Research in Nanotechnology, Vol. 2, Issue 2 · 3 Sep 2012 · 7,601 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA Novel Method for Testing Digital to Analog Converter in Static RangeK. Hariharan, S. Gouthamraj, B. Subramaniam et al.Problem statement: Linearity testing methods for DAC usually involves usage of non-linear analog components, which are indeed prone to various errors. Few other testing methodologies involve complex circuitry for measuring exactitude of DAC. Practically, it is difficult to build those as Built In Self Test (BIST) due to complexity of calculation, which demands more usage of ALU (or core of … …American Journal of Applied Sciences, Vol. 7, Issue 8 · 31 Aug 2010 · 7,458 accessesView PDFCite
Technical ReportOpen accessIn the abstractDesign of an 8-bit Incremental ADCXinlong Cai, Ze Chen, Zehong CaoThis technical report demonstrated a design an 8-bit switched-capacitor incremental ADC in UMC 0.13 μm CMOS. The design requirements are Supply voltage: 1.2V, Reference voltage (Vref): 1V, Resolution: 8 bits, Output data rate: 100 samples per second and Input voltage range: 0V to 1V. Furthermore, the determine the architecture of incremental A/D converter involved in fuzzy theory. The output waveforms … …American Journal of Engineering and Applied Sciences, Vol. 11, Issue 2 · 1 Jun 2018 · 8,163 accessesView PDFCite