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37 results for “parallel architecture”
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Research ArticleOpen accessIn the abstractA New Collaborative Pattern between Landscape Architects and Urban Designers in Environmental DesignMostafa Behzadfar, Mohsen Faizi, Sina Razzaghi Asl, Behzad Haji BeiklouProblem statement: Nowadays professions such as architecture, landscape architecture and urban design are playing a unique role in environmental design process. Meanwhile architecture is being separated from two other majors: landscape architecture and urban design by paying so much attention to constructing buildings. Landscape architecture and urban design have parallel subjects and goals and both have the intention to improve … …American Journal of Environmental Sciences, Vol. 6, Issue 4 · 31 Aug 2010 · 7,349 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Novel Methodology for Designing Radix-2n Serial-Serial MultipliersAbdurazzag Sulaiman AlmiladiProblem statement: The fast growth and increase in complexity of digital and image processing systems necessitate the migration from ad hoc design methods to methodological ones. Methodologies will certainly ease the trade off selection for those systems and shortens the design time. To increase those gained values and expand the searching space more appropriate methodologies need to be developed. Approach: … …Journal of Computer Science, Vol. 6, Issue 4 · 30 Apr 2010 · 6,922 accessesView PDFCite
Research ArticleOpen accessIn the abstractAcoustic Echo Cancellation: Dual Architecture ImplementationB. Stark, B. D. BarkanaProblem statement: With the rise in mobile communication, it is becoming more frequent to use a communication device in an enclosed noisy environment, such as a subway or in a lobby. In this setting however, the received microphone is severely degraded by the echo from the speaker and background noise. The audio processing necessary to clarify the desired speech can … …Journal of Computer Science, Vol. 6, Issue 2 · 28 Feb 2010 · 7,382 accessesView PDFCite
Research ArticleOpen accessIn the abstractOmega Network Hash ConstructionChai Wen Chuah, Azman SamsudinProblem statement: Cryptographic hash functions are important cryptographic primitives. They are commonly used for data integrity checking and data authentication. Most of the cryptographic hash functions are based on the Merkle-Damgård construction. The basic Merkle-Damgård construction runs over the input sequentially, which can lead to problems when the input size is large since the computation time increases linearly. Approach: Therefore, … …Journal of Computer Science, Vol. 5, Issue 12 · 31 Dec 2009 · 7,123 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number SystemSomayeh Timarchi, Omid Kavehei, Keivan NaviModulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the … …American Journal of Applied Sciences, Vol. 5, Issue 4 · 30 Apr 2008 · 7,561 accessesView PDFCite
Research ArticleOpen accessIn the abstractIrregular Class of Multistage Interconnection Network in Parallel ProcessingSandeep Sharma, K. S. Kahlon, P. K. Bansal, Kawaljeet SinghA major problem in designing a large-scale parallel and distributed system was the construction of an Interconnection Network (IN) to provide inter-processor communication. One of the biggest issues in the development of such a system was the development of an effective architecture and algorithms that have high reliability, give good performance (even in the presence of faults), low cost, low … …Journal of Computer Science, Vol. 4, Issue 3 · 31 Mar 2008 · 7,057 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of Low Phase Noise SIPC based Complementary LC-QVCO for IEEE 802.11a ApplicationHarikrishnan Ramiah, Tun Zainal Azni ZulkifliThe paper presents the design of a source injection parallel coupled (SIPC) quadrature voltage controlled oscillator (QVCO), realized in a complementary architecture, which is usually preferred in low-power applications as it exploits ≈50% bias current reduction with double efficiency compared to the structure with single coupled, when operating in the current-limited regime. A stacked spiral inductor exhibiting a Q factor … …American Journal of Applied Sciences, Vol. 5, Issue 2 · 28 Feb 2008 · 7,295 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Hardware Implementation of High Speed FFT CoreM. Kannan, S. K. SrivatsaApplications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power. This paper proposes the implementation of radix-4 based parallel-pipelined Fast Fourier Transform processor which incorporates a low power commutator, butter-fly with multiplier-less architecture. The proposed parallel pipelined architectures have the advantages of high throughput and low power consumption. The multiplier-less architecture uses shift … …Journal of Computer Science, Vol. 3, Issue 6 · 30 Jun 2007 · 7,227 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of a Merged DSP Microcontroller for Embedded Systems using Discrete Orthogonal TransformA. K. Rath, P. K. MeherIn this paper we have proposed the design of a DSP microcontroller where the processor load is significantly reduced by relegating the math-intensive DSP algorithm to dedicated transform computing modules. It is shown that the use of such transform modules will facilitate scalability, reusability and flexibility for implementation of wide varieties of DSP functionalities. Moreover, it would be possible to … …Journal of Computer Science, Vol. 2, Issue 5 · 31 Aug 2006 · 6,918 accessesView PDFCite
Research ArticleOpen accessIn the abstractHighly Efficient Elliptic Curve Crypto-Processor with Parallel GF(2m) Field MultipliersTurki F. Al-Somani, M. K. Ibrahim, Adnan GutubThis study presents a high performance GF(2m) Elliptic Curve Crypto-processor architecture. The proposed architecture exploits parallelism at the projective coordinate level to perform parallel field multiplications. In the proposed architecture, normal basis representation is used. Comparisons between the Projective, Jacobian and Mixed coordinate systems using sequential and parallel designs are presented. Results show that parallel designs using normal basis gives … …Journal of Computer Science, Vol. 2, Issue 5 · 31 May 2006 · 6,874 accessesView PDFCite