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23 articles for “VLSI”
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Research ArticleOpen accessIn the keywordsLow Power Analog Multiplier Using MifgmosK. Duraisamy, U. RagavendranA novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in saturation region are implemented. Floating gate MOSFETs are being utilized in a number of new and existing analog applications. These devices are not only useful for designing memory elements but also we can implement circuit elements. The main advantage in FGMOS is that the drain current is … …Journal of Computer Science, Vol. 9, Issue 4 · 14 May 2013 · 6,343 accessesView PDFCite
Research ArticleOpen accessIn the keywordsLow Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number SystemSomayeh Timarchi, Omid Kavehei, Keivan NaviModulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the … …American Journal of Applied Sciences, Vol. 5, Issue 4 · 30 Apr 2008 · 7,561 accessesView PDFCite
Research ArticleOpen accessIn the keywordsVHDL Specification Methodology from High-level SpecificationM. Benmohammed, S. MernizDesign complexity has been increasing exponentially this last decade. In order to cope with such an increase and to keep up designers' productivity, higher level specifications were required. Moreover new synthesis systems, starting with a high level specification, have been developed in order to automate and speed up processor design. This study presents a VHDL specification methodology aimed to extend … …Journal of Computer Science, Vol. 1, Issue 2 · 30 Jun 2005 · 6,937 accessesView PDFCite
Research ArticleOpen accessIn the abstractHigh Performance and Low Leakage 3DSOI Fin-FET SRAMD. Sudha, Ch. Santhirani, Sreenivasa Rao IjjadaIn recent semiconductor designs, the major key factors: Competent device simulations, precise device characterization, well power optimization, new architectural design and cost-effective fabrication drives the designers attention towards multi gate transistors as an alternative to MOSFET. Non planner device structures are a competitive edge over planner devices. Silicon-on-Insulator (SOI) FinFETs are hopeful among variety of multi-gate structures as they have … …American Journal of Engineering and Applied Sciences, Vol. 10, Issue 1 · 9 Feb 2017 · 7,346 accessesView PDFCite
Research ArticleOpen accessIn the abstractUltra Low Power MUX Based Compressors for Wallace and Dadda Multipliers in Sub-threshold RegimePriya Gupta, Anu Gupta, Abhijit AsatiThe computing efficiency of modern column compression multipliers offers a highly efficient solution to the binary multiplication problem and is well suited for VLSI implementations. The various analyses are established more on compressors circuits particularly with Multiplexer (MUX) design. Conventionally, compressors are anatomized into XOR gate and MUX design. In this study, fully MUX based compressors, utilizing the CMOS transmission … …American Journal of Engineering and Applied Sciences, Vol. 8, Issue 4 · 17 Nov 2015 · 8,612 accessesView PDFCite
Research ArticleOpen accessIn the abstractALL OPTICAL IMPLEMENTATION OF HIGH SPEED AND LOW POWER REVERSIBLE FULL ADDER USING SEMICONDUCTOR OPTICAL AMPLIFIER BASED MACH-ZEHNDER INTERFEROMETERR. M. Bommi, S. Selvakumar RajaIn the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversible Full … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,669 accessesView PDFCite
Research ArticleOpen accessIn the abstractAN EFFICIENT/ENHANCED CONTENT BASED IMAGE RETRIEVAL FOR A COMPUTATIONAL ENGINEK. V. Shriram, P. L.K. Priyadarsini, Kaushik Velusamy, A. BalachandranA picture or image is worth a thousand words. It is very much pertinent to the field of image processing. In the recent years, much advancement in VLSI technologies has triggered the abundant availability of powerful processors in the market. With the prices of RAM are having come down, the databases could be used to store information on the about … …Journal of Computer Science, Vol. 10, Issue 2 · 13 Nov 2013 · 7,266 accessesView PDFCite
Research ArticleOpen accessIn the abstractAn Optimized Device Sizing of Analog Circuits using Particle Swarm OptimizationP. Prem Kumar, K. DuraiswamyProblem statement: Day by day more and more products rely on analog circuits to improve the speed and reduce the power consumption(Products rely on analog circuits to improve the speed and reduce the power consumption day by day more and more.). For the VLSI implementation analog circuit design plays an important role. This analog circuit synthesis might be the most … …Journal of Computer Science, Vol. 8, Issue 6 · 19 Mar 2012 · 7,769 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of an Error Tolerant AdderA. N. Jayanthi, C. S. RavichandranProblem statement: In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. By adopting an emerging concept in VLSI design and test, Error Tolerance (ET), a novel Error-Tolerant Adder (ETA) is proposed. The ETA is able to ease the strict restriction on accuracy and at the same time achieve tremendous improvements in both the power consumption … …American Journal of Applied Sciences, Vol. 9, Issue 6 · 13 Mar 2012 · 7,249 accessesView PDFCite
Research ArticleOpen accessIn the abstractAdaptive Complementary Metal-Oxide-Semiconductor Device by Externally Controlled Gate Oxide ThicknessB. Gopi, R. S.D. WahidabanuProblem statement: Since the advent of IC and VLSI technology, the demand for high-speed devices and equipment is growing very rapidly. Every individual researcher is marching towards the dream of achieving it. The role of a design engineer is becoming more challenging. As per Moore’s law, the packing density doubles every eighteen months. This is possible only by scaling down … …Journal of Computer Science, Vol. 8, Issue 4 · 1 Feb 2012 · 7,103 accessesView PDFCite