Research ArticleOpen accessIn the abstractDesign and Analysis of Adders using Nanotechnology Based Quantum dot Cellular AutomataS. Karthigai Lakshmi, G. AthishaProblem statement: The area and complexity are the major issues in circuit design. Here, we propose different types of adder designs based on Quantum dot Cellular Automata (QCA) that reduces number of QCA cells and area compare to previous designs. The quantum dot cellular automata is a novel computing paradigm in nanotechnology that can implement digital circuits with faster speed, … …Journal of Computer Science, Vol. 7, Issue 7 · 30 Jun 2011 · 7,311 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Novel High Stop Band All Complementary MOSFET Switched-Capacitor FilterMoussa Abdallah, Ismail NabhanProblem statement: Filters are widely used in various applications including communications, electronics and biomedical engineering. The performance and size of the filter is of interest especially in chip implementation. A switched-capacitor low-pass filter was designed and simulated using a 0.18 μm 1P6M CMOS technology. Approach: This circuit design offered obvious advantages in increasing the stopband attenuation, reducing passband ripple and … …American Journal of Engineering and Applied Sciences, Vol. 2, Issue 4 · 31 Dec 2009 · 7,863 accessesView PDFCite
Research ArticleOpen accessIn the abstractCar Safety System Using Fuzzy LogicMazin Al-Hadidi, Yasir Khalil Ibrahim, Yarob Adnan IstitiehNowadays everybody can recognize the huge increasing of car numbers on roads. Day after day, this increasing may be an indicator for changing and development. This put a lot of challenges on people and governments. One of these challenges is car accidents and there bad effects. The main aim of our proposal is to help our society to decrease car … …Journal of Computer Science, Vol. 4, Issue 12 · 31 Dec 2008 · 7,157 accessesView PDFCite
Research ArticleOpen accessIn the abstractControl Strategy for Discontinuous Conduction Mode Boost Rectifier with Low Total Harmonic Distortion and Improved Dynamic ResponseH.S. AthabDue to its simplicity, the discontinuous conduction mode boost rectifier is potentially the least expensive active line-harmonics reducing circuit. Problem statement: The line current however, shows considerable distortion when the peak input voltage is close to the output voltage, As a result, the input power factor is poor. This study proposes a simple, low-cost method to reduce the line harmonics. … …American Journal of Engineering and Applied Sciences, Vol. 1, Issue 4 · 31 Dec 2008 · 7,418 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordLow Cost Smart Sensor DesignTakialddin A. Al SmadiProblem statement: Sensor with local processing power that enables it to react to local conditions without having to refer back to the central controller. The size and the cost of smart sensor circuit have been reduced. Approach: The use of microcontroller, such as (PIC16C715), with an 8-bit ADC (Analogue to Digital Converter) in one chip. This reduction in the circuit … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 1 · 11 Feb 2016 · 7,574 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordUltra Low Power MUX Based Compressors for Wallace and Dadda Multipliers in Sub-threshold RegimePriya Gupta, Anu Gupta, Abhijit AsatiThe computing efficiency of modern column compression multipliers offers a highly efficient solution to the binary multiplication problem and is well suited for VLSI implementations. The various analyses are established more on compressors circuits particularly with Multiplexer (MUX) design. Conventionally, compressors are anatomized into XOR gate and MUX design. In this study, fully MUX based compressors, utilizing the CMOS transmission … …American Journal of Engineering and Applied Sciences, Vol. 8, Issue 4 · 17 Nov 2015 · 8,612 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordA PARTICLE SWARM OPTIMIZATION APPROACH FOR LOW POWER VERY LARGE SCALE INTEGRATION ROUTINGG. Nallathambi, S. RajaramThis study deals with the particle swarm optimization approach for optimal power dissipation in VLSI interconnect driven routing technique. Interconnect power dissipation is a major challenging research problem in Deep Submicron (DSM) regime that affects the overall circuit performance. The Buffer Insertion Buffer Sizing and Wire Sizing (BISWS) is considered for minimizing the power dissipation in VLSI circuits using interconnect … …Journal of Mathematics and Statistics, Vol. 10, Issue 1 · 1 Feb 2014 · 6,741 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordLow Power Analog Multiplier Using MifgmosK. Duraisamy, U. RagavendranA novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in saturation region are implemented. Floating gate MOSFETs are being utilized in a number of new and existing analog applications. These devices are not only useful for designing memory elements but also we can implement circuit elements. The main advantage in FGMOS is that the drain current is … …Journal of Computer Science, Vol. 9, Issue 4 · 14 May 2013 · 6,343 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordLow Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number SystemSomayeh Timarchi, Omid Kavehei, Keivan NaviModulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the … …American Journal of Applied Sciences, Vol. 5, Issue 4 · 30 Apr 2008 · 7,561 accessesView PDFCite