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23 results for “digital circuit design”
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Research ArticleOpen accessIn the keywordsDesign and Analysis of Adders using Nanotechnology Based Quantum dot Cellular AutomataS. Karthigai Lakshmi, G. AthishaProblem statement: The area and complexity are the major issues in circuit design. Here, we propose different types of adder designs based on Quantum dot Cellular Automata (QCA) that reduces number of QCA cells and area compare to previous designs. The quantum dot cellular automata is a novel computing paradigm in nanotechnology that can implement digital circuits with faster speed, … …Journal of Computer Science, Vol. 7, Issue 7 · 30 Jun 2011 · 7,311 accessesView PDFCite
Research ArticleOpen accessIn the keywordsSolving the State Assignment Problem Using Stochastic Search Aided with Simulated AnnealingWalid M. AlyProblem statement: Solving the state assignment problem means finding the optimum assignment for each state within a sequential digital circuit. These optimum assignments will result in decreasing the hardware realization cost and increasing the reliability of the digital circuit. Unfortunately, the state assignment problem belongs to the class of nondeterministic polynomial time problems (NP complete) which requires heavy computations. Different … …American Journal of Engineering and Applied Sciences, Vol. 2, Issue 4 · 31 Dec 2009 · 6,966 accessesView PDFCite
Research ArticleOpen accessIn the abstractImproved Fuzzy Logic Controller Implemented on FPGA Circuit for Photovoltaic SystemsAouatif Ibnelouad, Abdeljalil Elkari, Hassan Ayad, Mostafa MjahedTo be the photovoltaic arrays capable to transport the maximum power obtainable, it must be combined with Maximum Power Point Tracking (MPPT). To succeed, we will improve a Maximum Power Point Tracking (MPPT) method, based on intelligent technique such as Fuzzy Logic Controller (FLC), compared with a conventional method which is P&O. This improved method applied to a stand-alone photovoltaic … …Journal of Computer Science, Vol. 16, Issue 5 · 5 Jun 2020 · 7,520 accessesView PDFCite
Research ArticleOpen accessIn the abstractMicrostrip Bandpass Filter with Wide Stopband and High Out-of-Band RejectionMohamad Farhat, Bal Virdee, Nader H. GhareebThis paper presents a compact microstrip bandpass filter exhibiting a wide stopband, high selectivity and easily tunable passband. The filter comprises of asymmetric resonator structures, which are interconnected by an inter-digital capacitor to enable the realization of a wide bandwidth with high rejection level. High selectivity and easily tunable passband are obtained by optimizing the parameters of the interdigital capacitor. … …American Journal of Engineering and Applied Sciences, Vol. 12, Issue 4 · 28 Dec 2019 · 8,795 accessesView PDFCite
Technical ReportOpen accessIn the abstractDesign of an 8-bit Incremental ADCXinlong Cai, Ze Chen, Zehong CaoThis technical report demonstrated a design an 8-bit switched-capacitor incremental ADC in UMC 0.13 μm CMOS. The design requirements are Supply voltage: 1.2V, Reference voltage (Vref): 1V, Resolution: 8 bits, Output data rate: 100 samples per second and Input voltage range: 0V to 1V. Furthermore, the determine the architecture of incremental A/D converter involved in fuzzy theory. The output waveforms … …American Journal of Engineering and Applied Sciences, Vol. 11, Issue 2 · 1 Jun 2018 · 8,163 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Cost Smart Sensor DesignTakialddin A. Al SmadiProblem statement: Sensor with local processing power that enables it to react to local conditions without having to refer back to the central controller. The size and the cost of smart sensor circuit have been reduced. Approach: The use of microcontroller, such as (PIC16C715), with an 8-bit ADC (Analogue to Digital Converter) in one chip. This reduction in the circuit … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 1 · 11 Feb 2016 · 7,574 accessesView PDFCite
Research ArticleOpen accessIn the abstractAREA EFFICIENT DISTRIBUTED ARITHMETIC DISCRETE COSINE TRANSFORM USING MODIFIED WALLACE TREE MULTIPLIERR. P. Meenaakshi Sundari, R. Anita, V. VenkateshwaranIn this study by using the modified Wallace tree multiplier, an error compensated adder tree is constructed in order to round off truncation errors and to obtain high through put discrete cosine transform design. Peak Signal to Noise Ratio (PSNR) is met efficiently since modified Wallace Tree method is an efficient, hardware implementable digital circuit that multiplies two integers resulting … …American Journal of Applied Sciences, Vol. 11, Issue 2 · 19 Dec 2013 · 7,331 accessesView PDFCite
Research ArticleOpen accessIn the abstractComparative Analysis of Reversible Logic Based Carbon Nano Tube Field Effect Transistor Multiplexer PerformanceY. Varthamanan, V. KannanThis study is about the design and analysis of a reversible logic based multiplexer, that is realized using carbon nano tube transistor. Reversible logic realization of the digital circuits offers numerous advantages over conventional circuit design. Power analysis was performed using HSPICE simulation software and the results are obtained for the 2×1 and 4×1 multiplexer transient behavior. The power consumption … …American Journal of Applied Sciences, Vol. 10, Issue 11 · 5 Oct 2013 · 6,637 accessesView PDFCite
Research ArticleOpen accessIn the abstractVLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select AdderS. Karunakaran, N. KasthuriRecent advances in mobile computing and multimedia applications demand high-performance and low-power VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital Finite Impulse … …American Journal of Applied Sciences, Vol. 9, Issue 12 · 5 Jan 2013 · 7,179 accessesView PDFCite