Author

Muhammad H. Rais

5 articles in our journals

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Research ArticleOpen accessField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,677 accessesView PDF Cite

Research ArticleOpen accessBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDF Cite

Research ArticleOpen accessField Programmable Gate Arrays Based Realization of Truncated MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Due to high cost and non reconfiguration of Application Specific Integrated Circuits (ASICs) in image processing applications, for example MPEG video compression used in CT scan frames requires real time conditions and the algorithms should be verified and optimized before implementation. Approach: Field Programmable Gate Array (FPGA) provides reconfiguration and implementation at the same time. Results: The implementation … …American Journal of Applied Sciences, Vol. 8, Issue 7 · 24 Jun 2011 · 6,694 accessesView PDF Cite

Research ArticleOpen accessDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,123 accessesView PDF Cite

Research ArticleOpen accessHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDF Cite