Sign inSubmit
Tips: “quotes” for a phrase · author:Lee · a DOI goes straight to its article

6 results for “Zero Current Switching”
Set a search alert
Research ArticleOpen accessIn the keywordsAn Analysis of Interleaved Boost Converter with LC Coupled Enhanced Soft SwitchingR. Vijayabhasker, S. Palaniswami, V. Venkatesa Kumar, M. Newlin Raj KumarAn enhanced soft switching technique for an interleaved boost converter with Zero Current Switching (ZCS) and Zero Voltage Switching (ZVS) during OFF and ON conditions of the main switches, that can drive large loads operated in duty cycle greater than 0.5 is proposed in this study. In this topology, auxiliary circuit is composed of resonant tank which is used to … …American Journal of Applied Sciences, Vol. 10, Issue 4 · 10 Apr 2013 · 6,091 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Simulation of a Soft Switched Dc Boost Converter for Switched Reluctance MotorX. Felix Joseph, S. Pushpa KumarProblem statement: This study presents the design and simulation of a soft switched boost converter for a switched reluctance motor with a closed loop controller. A soft switching scheme is proposed in the converter with minimum components, which reduces the switching loss and stress across the switch so that the harmonic generation is reduced in the output. The switch used … …American Journal of Applied Sciences, Vol. 9, Issue 3 · 2 Feb 2012 · 7,176 accessesView PDFCite
Research ArticleOpen accessIn the keywordsGenetic Based Plus Integral Controller for PMBLDC Motor Control using Resonant Pole InverterMuruganantham, PalaniPermanent Magnet Brushless DC (PMBLDC) motor drives are increasingly popular in industrial applications due to rapid progress of technologies in power electronics and the growing demand for energy saving. The increasing demand of energy saving from society is the external force for the development of PMBLDC motor drives. It is however driven by a hard-switching Pulse Width Modulation (PWM) inverter, … …American Journal of Applied Sciences, Vol. 9, Issue 12 · 5 Jan 2013 · 8,146 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Novel Architecture of Maximum Power Point Tracking for Ultra-Low-Power Based Hybrid Energy Harvester in Ubiquitous Devices: A ReviewMichelle Lim Sern Mi, Sawal Hamid Muhammad Ali, Md Shabiul IslamThis research work presents a novel architecture of an Ultra-Low-Power (ULP) based Hybrid Energy Harvester (HEH) consisting of multiple input sources such as kinetic, thermal and solar energy, harvested from passive human power. Having multiple ambient sources mitigates limitations caused by single sources especially for bodily-worn applications; however, this results in impedance mismatch among the different integrated sources. To overcome … …American Journal of Applied Sciences, Vol. 10, Issue 10 · 6 Sep 2013 · 7,155 accessesView PDFCite
Research ArticleOpen accessIn the abstractSimplified Modeling, Analysis and Simulation of Permanent Magnet Brushless Direct Current Motors for Sensorless OperationE. Kaliappan, C. ChellamuthuProblem statement: In this study, a simplified modeling and experimental analysis of Permanent Magnet Brushless DC (PMBLDC) motors for Sensorless operation using MATLAB/SIMULINK. This model provides a mechanism for monitoring and controlling the voltage, current, speed and torque response. Approach: BLDC motor is modeled as sub-blocks. The inverter and switching function are implemented as S-function builder block. The Sensorless scheme … …American Journal of Applied Sciences, Vol. 9, Issue 7 · 16 May 2012 · 7,643 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of Low- Power High-Speed Error Tolerant Shift and Add MultiplierK. N. Vijeyakumar, V. Sumathy, Sriram Komanduri, C. Chrisjin Gnana SujiProblem Statement: In this study, we had proposed a low power architecture for high speed multiplication. Approach: The modifications to the conventional shift and add multiplier includes introduction of modified error tolerant technique for addition and enabling of adder cell by current multiplication bit of the multiplier constant. The proposed architecture enables the removal of input multiplexer, switching of adder … …Journal of Computer Science, Vol. 7, Issue 12 · 18 Oct 2011 · 7,155 accessesView PDFCite