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23 articles for “VLSI”
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Research ArticleOpen accessEvery word in the titleVLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select AdderS. Karunakaran, N. KasthuriRecent advances in mobile computing and multimedia applications demand high-performance and low-power VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital Finite Impulse … …American Journal of Applied Sciences, Vol. 9, Issue 12 · 5 Jan 2013 · 7,179 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleVLSI Implementation of Channel Estimation for MIMO-OFDM TransceiverJoseph Gladwin Sekar, Salivahanan SankarappanIn this study the VLSI architecture for MIMO-OFDM transceiver and the algorithm for the implementation of MMSE detection in MIMO-OFDM system is proposed. The implemented MIMO-OFDM system is capable of transmitting data at high throughput in physical layer and provides optimized hardware resources while achieving the same data rate. The proposed architecture has low latency, high throughput and efficient resource … …American Journal of Applied Sciences, Vol. 10, Issue 10 · 6 Sep 2013 · 6,550 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleParallel Memetic Algorithm for VLSI Circuit Partitioning Problem using Graphical Processing UnitsP. Subbaraj, P. SivakumarProblem statement: Memetic Algorithm (MA) is a form of population-based hybrid Genetic Algorithm (GA) coupled with an individual learning procedure capable of performing local refinements. Here we used genetic algorithm to explore the search space and simulated annealing as a local search method to exploit the information in the search region for the optimization of VLSI netlist bi-Partitioning problem. However, … …Journal of Computer Science, Vol. 8, Issue 5 · 27 Feb 2012 · 7,090 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleVLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless ReceiversRozita Teymourzadeh, Yazan Samir Algnabi, Masuri Othman et al.Problem statement: The need for high performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize latest technique identified as over sampling systems. It was the most economical modulator and decimation in communication system. It has been proven to increase the SNR and is used in many high performance systems such as in the … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 5 Nov 2010 · 7,815 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA PARTICLE SWARM OPTIMIZATION APPROACH FOR LOW POWER VERY LARGE SCALE INTEGRATION ROUTINGG. Nallathambi, S. RajaramThis study deals with the particle swarm optimization approach for optimal power dissipation in VLSI interconnect driven routing technique. Interconnect power dissipation is a major challenging research problem in Deep Submicron (DSM) regime that affects the overall circuit performance. The Buffer Insertion Buffer Sizing and Wire Sizing (BISWS) is considered for minimizing the power dissipation in VLSI circuits using interconnect … …Journal of Mathematics and Statistics, Vol. 10, Issue 1 · 1 Feb 2014 · 6,741 accessesView PDFCite
Research ArticleOpen accessIn the keywordsReengineering Legacy to Modern System with One Time Checker for Information System EvolutionP. Sudhakar, P. SakthivelProblem statement: The prime focus of Information System (IS) evolution process is the aggrandize productivity and quality of various components of the system. The evolution process is always challenging as it leads to an increase in overall complexity especially when the system changes are mostly confined to part of it. Approach: In this respect to improve efficiency and decrease complexity, … …American Journal of Applied Sciences, Vol. 9, Issue 6 · 14 Mar 2012 · 7,268 accessesView PDFCite
Research ArticleOpen accessIn the keywordsFramework for Managing the Very Large Scale Integration Design ProcessSabah Al-Fedaghi, Eman Al-DwaisanProblem statement: The VLSI design cycle was described in terms of successive states and substages; it starts with system specification and ends with packaging. At the next descriptive level, currently known methodologies (e.g., flowchart based, object-oriented based) lack a global conceptual representation suitable for managing the VLSI design process. Technical details were intermixed with tool-dependent and implementation issues such as … …American Journal of Applied Sciences, Vol. 9, Issue 2 · 13 Dec 2011 · 7,491 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Implementation of a Genetic Algorithm Based Canonical Singed Digit Multiplierless Fast Fourier Transform Processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband ApplicationsMahmud Benhamid, Masuri B. OthmanProblem statement: Ultra Wide Band (UWB) technology has attracted many researchers' attention due to its advantages and its great potential for future applications. The physical layer standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB system is defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 … …Journal of Mathematics and Statistics, Vol. 5, Issue 4 · 31 Dec 2009 · 7,515 accessesView PDFCite
Research ArticleOpen accessIn the keywordsNOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATESM. Saravanan, K. Suresh ManicMultipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,706 accessesView PDFCite
Research ArticleOpen accessIn the keywordsAN EFFICIENT CELL PLACEMENT USING GRAVITATIONAL SEARCH ALGORITHMSRose Al Qasem, Taisir EldosIn modern chip design, cell placement is a stage in which cells representing well-defined functions are assigned physical locations, in a way that optimizes the total area and routing length. Cell placement is an NP-complete problem and the exact solution is generally far from reach for a practically sized instance. Hence, diversified heuristic algorithms are used to solve this problem. … …Journal of Computer Science, Vol. 9, Issue 8 · 25 Jun 2013 · 7,371 accessesView PDFCite