Research ArticleOpen accessEvery word in the titleDesign and Analysis of SRAM Cell for Smart ApplicationPushkar Praveen, Rakesh Kumar SinghIn today's circuittechnology, power consumption and savings are key concerns. The driving reasonsbehind these innovations are portable devices that require high throughput andlow power dissipation, such as computers, phones, and Personal DigitalAssistants (PDAs). In portable devices, reducing or decreasing IC dissipatedpower through design optimization is a big problem, and restricted batterylifespan places very severe restrictions on overall power usage. In … …Journal of Computer Science, Vol. 18, Issue 9 · 17 Sep 2022 · 5,726 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleHigh Performance and Low Leakage 3DSOI Fin-FET SRAMD. Sudha, Ch. Santhirani, Sreenivasa Rao IjjadaIn recent semiconductor designs, the major key factors: Competent device simulations, precise device characterization, well power optimization, new architectural design and cost-effective fabrication drives the designers attention towards multi gate transistors as an alternative to MOSFET. Non planner device structures are a competitive edge over planner devices. Silicon-on-Insulator (SOI) FinFETs are hopeful among variety of multi-gate structures as they have … …American Journal of Engineering and Applied Sciences, Vol. 10, Issue 1 · 9 Feb 2017 · 7,346 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleFAULT AND RELIABILITY ANALYSIS OF CARBON NANO TUBE FET SRAM IN THE PRESENCE OF SINGLE EVENT UPSETT. R. Rajalakshmi, R. SudhakarCarbon nano tube devices are considered as a better replacement for CMOS technology nowadays due to its decreased sizing and increased performance. Resistive open and bridging faults play vital role in the dynamic fault analysis. These faults are important since the number of interconnects have increased. In this study we discuss the effect of open and bridging defects along with … …American Journal of Applied Sciences, Vol. 11, Issue 8 · 28 May 2014 · 6,653 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign For Test Technique for Leakage Power Reduction in Nanoscale Static Random Access MemoryN. M. Sivamangai, GunavathiProblem statement: As technology scales down, the integration density of transistors increases and most of the power is dissipated as leakage. Leakage power reduction is achieved in Static Random Access Memory (SRAM) cells by increasing the source voltage (source biasing) of the SRAM array. Another promising issue in nanoscaled devices is the process parameter variations. Due to these variations, higher … …Journal of Computer Science, Vol. 7, Issue 8 · 15 Jul 2011 · 6,505 accessesView PDFCite
Research ArticleOpen accessIn the author namesSimulation of the Pedestrians' Influence to the Capacity of Motorised Vehicles in a RoundaboutT. Tollazzi, T. Lerher, M. ŠramlA new approach is suggested for dimensioning roundabouts with mathematical modeling of traffic flows using the discreet simulation method, and considering the statistically evaluated entry data for vehicles’ and pedestrians’ traffic flows. The simulation results are useful when determining the capacity of the roundabouts, which will function in different circumstances. The presented model derives from the expected time void in … …American Journal of Applied Sciences, Vol. 5, Issue 1 · 31 Jan 2008 · 6,896 accessesView PDFCite