Sign inSubmit
Tips: “quotes” for a phrase · author:Lee · a DOI goes straight to its article

21 articles for “Power Dissipation”

Set a search alert
Research ArticleOpen accessIn the keywordsA PARTICLE SWARM OPTIMIZATION APPROACH FOR LOW POWER VERY LARGE SCALE INTEGRATION ROUTINGG. Nallathambi, S. RajaramThis study deals with the particle swarm optimization approach for optimal power dissipation in VLSI interconnect driven routing technique. Interconnect power dissipation is a major challenging research problem in Deep Submicron (DSM) regime that affects the overall circuit performance. The Buffer Insertion Buffer Sizing and Wire Sizing (BISWS) is considered for minimizing the power dissipation in VLSI circuits using interconnect … …Journal of Mathematics and Statistics, Vol. 10, Issue 1 · 1 Feb 2014 · 6,741 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign of Low- Power High-Speed Error Tolerant Shift and Add MultiplierK. N. Vijeyakumar, V. Sumathy, Sriram Komanduri, C. Chrisjin Gnana SujiProblem Statement: In this study, we had proposed a low power architecture for high speed multiplication. Approach: The modifications to the conventional shift and add multiplier includes introduction of modified error tolerant technique for addition and enabling of adder cell by current multiplication bit of the multiplier constant. The proposed architecture enables the removal of input multiplexer, switching of adder … …Journal of Computer Science, Vol. 7, Issue 12 · 18 Oct 2011 · 7,155 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign and Analysis of SRAM Cell for Smart ApplicationPushkar Praveen, Rakesh Kumar SinghIn today's circuittechnology, power consumption and savings are key concerns. The driving reasonsbehind these innovations are portable devices that require high throughput andlow power dissipation, such as computers, phones, and Personal DigitalAssistants (PDAs). In portable devices, reducing or decreasing IC dissipatedpower through design optimization is a big problem, and restricted batterylifespan places very severe restrictions on overall power usage. In … …Journal of Computer Science, Vol. 18, Issue 9 · 17 Sep 2022 · 5,726 accessesView PDFCite
Research ArticleOpen accessIn the abstractThe Effects of Oil Film Shape on Piston Ring and Liner Tribology Under Mixed LubricationAbbas Razavykia, Cristiana Delprete, Eugenio Brusa, Yaser HosseiniMechanical power loss reduction at lubricated reciprocating and rotating components is recognized as an approach to improve the efficiency and to reduce the emissions of Internal Combustion Engines (ICEs). To achieve these goals, the instantaneous investigation of lubrication characteristics is required. Piston ring pack is of paramount importance as it is known as major contributor to frictional losses and energy … …American Journal of Engineering and Applied Sciences, Vol. 14, Issue 4 · 10 Nov 2021 · 6,523 accessesView PDFCite
Research ArticleOpen accessIn the abstractThermal Treatment Effects on the Thermoelectric Properties of Ni/Si/Si + Sb/Si/Si + Ge/Ni Multilayer Thin FilmsSatilmis Budak, Zhigang Xiao, Shujun YangThe multilayer thermoelectric devices including Ni/200 layers of Si/Si + Sb/200 layers of Si/Si + Ge/Ni thin films were fabricated using electron beam and DC/RF magnetron sputtering deposition systems. The thickness measurements have been performed using Filmetrics UV thickness measurement system. The Au contacts at the bottom and top of the fabricated thermoelectric devices were measured as 100 nm for … …American Journal of Engineering and Applied Sciences, Vol. 13, Issue 4 · 14 Nov 2020 · 6,710 accessesView PDFCite
Research ArticleOpen accessIn the abstractA 10GHZ Low-Offset Dynamic Comparator for High-Speed and Lower-Power ADCSBakoune Pierre Hypolite, Wembe Tafo Evariste, Moukengue Imano AdolpheThis paper proposed a design of low-voltage Dynamic Comparator using 90 nm PTM CMOS technology for high-speed and Lower-power Analog to Digital Converter (ADC) applications. The double tail structure is employed as based for design new comparator with positive feedback due to best behavior in low-voltage that allows low delay time; decreases the offset voltage and power dissipation. Simulation results … …American Journal of Engineering and Applied Sciences, Vol. 12, Issue 2 · 6 May 2019 · 7,671 accessesView PDFCite
Research ArticleOpen accessIn the abstractA New Approach to Model Concentrating PV Cells Under Non-Uniform IlluminationHang Zhou, Yuehong Su, Gang Pei et al.Concentrating PV (CPV) cells are often designed optimally depending on solar concentrator characteristics and operating conditions to ensure the best system performance. Before reaching a PV cell, solar radiation may experience some optical losses caused by the different physical phenomena occurring in a solar concentrator. A particular issue with the CPV technology is the non-uniformity of the concentrated radiation, which … …Energy Research Journal, Vol. 8, Issue 2 · 30 Aug 2017 · 7,137 accessesView PDFCite
Research ArticleOpen accessIn the abstractCoupling Routing Algorithm and Data Encoding for Low Power Networks on ChipMaurizio Palesi, Davide Patti, Giuseppe Ascia et al.The routing algorithm used in a Network-on-Chip (NoC) has a strong impact on both the functional and non functional indices of the overall system. Traditionally, routing algorithms have been designed considering performance and cost as the main objectives. In this study we focus on two important non functional metrics, namely, power dissipation and energy consumption. We propose a selection policy … …Journal of Computer Science, Vol. 11, Issue 3 · 4 May 2015 · 6,928 accessesView PDFCite
Research ArticleOpen accessIn the abstractDESIGN OF HIGH-SPEED PARALLEL IN PARALLEL OUT SHIFT REGISTER USING ALGAAS/GAAS MODFET TECHNOLOGYV. Ganesan, K. S. ShajiThis study enumerates the efficient design and analysis of Parallel In Parallel Out (PIPO) shift register using AlGaAs/GaAs MODFET D Flip-flop. The transient and power analysis are obtained with operating voltage at 1.3 V for the D flip-flop and PIPO shift register using pspice tool. There are many issues facing while integrating many number of transistors like delay, power dissipation, … …American Journal of Applied Sciences, Vol. 11, Issue 8 · 8 May 2014 · 7,146 accessesView PDFCite
Research ArticleOpen accessIn the abstractNOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATESM. Saravanan, K. Suresh ManicMultipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,706 accessesView PDFCite