3 results for “Flip-Flop”

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Research ArticleOpen accessPhrase in the titleLow Power Multiplier Design Using Latches and Flip-FlopsC. N. Marimuthu, P. ThangarajProblem statement: Power dissipation is designated as critical parameter in modern VLSI design field. In VLSI implementation low power concept is necessary to meet Moore’s law and to produce consumer electronics with more back up and less weight. To save significant power consumption of a VLSI design, it is a good direction to reduce its dynamic power which is the … …Journal of Computer Science, Vol. 6, Issue 10 · 30 Jul 2010 · 7,372 accessesView PDF Cite

Research ArticleOpen accessEvery word in the titleUltra Low Power Single Edge Triggered Delay Flip Flop Based Shift Registers Using 10-Nanometer Carbon Nano Tube Field Effect TransistorRavi Thiyagarajan, Kannan VeerappanCarbon Nano Tube Field Effect Transistor is currently considered as promising successor of Metal Oxide Semiconductor Field Effect Transistor. The scaling down of the Metal Oxide Semiconductor device faced serious limits like short channel effect, tunnelling through gate oxide layer, associated leakage currents and power dissipation when its dimension shrink down to 22 nanometer range. Further scaling of Metal Oxide … …American Journal of Applied Sciences, Vol. 10, Issue 12 · 14 Oct 2013 · 6,749 accessesView PDF Cite

Research ArticleOpen accessIn the keywordsDESIGN OF HIGH-SPEED PARALLEL IN PARALLEL OUT SHIFT REGISTER USING ALGAAS/GAAS MODFET TECHNOLOGYV. Ganesan, K. S. ShajiThis study enumerates the efficient design and analysis of Parallel In Parallel Out (PIPO) shift register using AlGaAs/GaAs MODFET D Flip-flop. The transient and power analysis are obtained with operating voltage at 1.3 V for the D flip-flop and PIPO shift register using pspice tool. There are many issues facing while integrating many number of transistors like delay, power dissipation, … …American Journal of Applied Sciences, Vol. 11, Issue 8 · 8 May 2014 · 7,146 accessesView PDF Cite