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21 results for “Field programmable gate array (FPGA)”
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Research ArticleOpen accessIn the keywordsImproved Fuzzy Logic Controller Implemented on FPGA Circuit for Photovoltaic SystemsAouatif Ibnelouad, Abdeljalil Elkari, Hassan Ayad, Mostafa MjahedTo be the photovoltaic arrays capable to transport the maximum power obtainable, it must be combined with Maximum Power Point Tracking (MPPT). To succeed, we will improve a Maximum Power Point Tracking (MPPT) method, based on intelligent technique such as Fuzzy Logic Controller (FLC), compared with a conventional method which is P&O. This improved method applied to a stand-alone photovoltaic … …Journal of Computer Science, Vol. 16, Issue 5 · 5 Jun 2020 · 7,520 accessesView PDFCite
Research ArticleOpen accessIn the keywordsReconfigurable Hardware Architecture for Network Intrusion Detection SystemA. Kaleel Rahuman, G. AthishaIntrusion rule processing in reconfigurable hardware enables intrusion detection and prevention. The use of reconfigurable hardware for network security applications has great strides as Field Programmable Gate Array (FPGA) devices have provided larger and faster resources. This proposes architecture called “BV-TCAM” is presented, which is implemented for an FPGA-based Network Intrusion Detection Systems (NIDS). The BV-TCAM architecture combines the Ternary … …American Journal of Applied Sciences, Vol. 9, Issue 10 · 16 Aug 2012 · 6,981 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign of Field Programmable Gate Array Based Emulators for Motor Control ApplicationsAhmed Ben Achballah, Slim Ben Othman, Slim Ben SaoudProblem statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important time consuming stage in a design flow. High Level Synthesis technique avoids this bottleneck and increases design productivity as witnessed by industry specialists. Approach: This study proposes to … …American Journal of Applied Sciences, Vol. 9, Issue 8 · 12 Jun 2012 · 8,723 accessesView PDFCite
Research ArticleOpen accessIn the keywordsBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,123 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDFCite
Research ArticleOpen accessIn the keywordsFPGA Based SPWM Bridge InverterM. N. Md Isa, M.I. Ahmad, Sohiful A.Z. Murad, M.K. Md ArshadThis study presents methodology to generate sinusoidal pulse width modulation (SPWM) signal using Field Programmable Gate Array, FPGA technology. We discussed the unipolar switching scheme and the methodology to generate the signal with the predetermined switching frequencies. Simulation on the designed pulses was conducted using Altera Max Plus II simulation tools. This simulation method was used to get the desired … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,396 accessesView PDFCite
Research ArticleOpen accessIn the keywordsField Programmable Gate Array Based RF-THI Pulse Width Modulation Control for Three Phase Nverter Using Matlab Modelsim CosimulationValantina Stephen, L. Padma Suresh, P. MuthukumarThis study proposes different configurations of PWM techniques for harmonic reduction and improvement of fundamental peak voltage. For providing adjustable frequency power to industrial applications, three-phase inverter is preferred. The general aim of this study is to reduce the third order harmonics and improve the Harmonic Spread Factor by different PWM techniques using matlab modelsim cosimulation. The gating signals to … …American Journal of Applied Sciences, Vol. 9, Issue 11 · 1 Sep 2012 · 7,443 accessesView PDFCite
Research ArticleOpen accessIn the keywordsEfficient Realization of S-Box based reduced Residue of Prime Numbers using Virtex-5 and Virtex-6 FPGAsMohammed H. Al MijalliProblem statement: The S-Box transformation is a computationally intensive and important operation of the Advanced Encryption Standard (AES). Approach: This study presents the comparative study between reduced Residue of Prime Numbers and Galois Filed GF (28) based SBoxes using Virtex-5 and Virtex-6 FPGA devices. The implementation of S-Boxes is done using Very High speed integrated circuit Hardware Description Language (VHDL). … …American Journal of Applied Sciences, Vol. 8, Issue 8 · 18 Jul 2011 · 6,975 accessesView PDFCite
Research ArticleOpen accessIn the keywordsSpartan-3AN Field Programmable Gate Arrays Truncated Multipliers Delay StudyMohammed H. Al MijalliProblem statement: The image processing applications, such as MPEG video compression used in CT scan frames requires real time conditions and the algorithms should be verified and optimized before implementation which cannot be done with Application Specific Integrated Circuits (ASICs) because they are not reconfigurable and cost is very high. Approach: The FPGA is a viable technology that could be … …American Journal of Applied Sciences, Vol. 8, Issue 6 · 13 Jun 2011 · 6,428 accessesView PDFCite