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45 results for “FPGA Implementation”
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Research ArticleOpen accessPhrase in the titleFPGA Implementation of Power Aware FIR Filter Using Reduced Transition Pipelined Variable Precision GatingA. Senthilkumar, A. M. NatarajanWith the emergence of portable computing and communication system, power awareness is one of the major objectives of VLSI Design. This is its ability to scale power consumption based on the time-varying nature of inputs. Even though the system is not designed for being power aware, systems display variations in power consumption as conditions change. This implies, by the definition … …Journal of Computer Science, Vol. 4, Issue 2 · 28 Feb 2008 · 7,315 accessesView PDFCite
Research ArticleOpen accessPhrase in the titleEfficient FPGA Implementation to Estimate the Maximum Output Power of a Photovoltaic Panel Using Xilinx System GeneratorRezki Tadrist, Adnane Hassani, Mountassar Maamoun, Ali NesbaThis paper presents an efficient architecture for different mathematical models for optimal design of a photovoltaic system using Xilinx System Generator (XSG). This architecture offers an alternative through a graphical user interface that combines MATLAB/Simulink and XSG and explores important aspects of the experimental implementation. The use of the Xilinx generator for calculating the power output of a photovoltaic system … …American Journal of Applied Sciences, Vol. 13, Issue 5 · 5 May 2016 · 7,323 accessesView PDFCite
Research ArticleOpen accessPhrase in the titleFPGA IMPLEMENTATION AND ANALYSIS OF IMPULSE NOISE REDUCTION IN IMAGESP. Thirumurugan, S. Sasikumar, C. SugapriyaThe images are affected by random valued impulse noises during the image capturing and processing stages. In this study, an efficient, high performance and low hardware utilized impulse noise reduction algorithm is presented. This methodology determines the optimum direction pixels through the estimation of standard deviation. The edges in the images are preserved during the process of impulse noise detection … …American Journal of Applied Sciences, Vol. 11, Issue 7 · 19 Apr 2014 · 7,200 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDFCite
Research ArticleOpen accessIn the keywordsFPGA-Based Architecture for a Generalized Parallel 2-D MRI Filtering AlgorithmSami Hasan, Said Boussakta, Alex YakovlevProblem statement: Current Neuroimaging developments, in biological research and diagnostics, demand an edge-defined and noise-free MRI scans. Thus, this study presents a generalized parallel 2-D MRI filtering algorithm with their FPGA-based implementation in a single unified architecture. The parallel 2-D MRI filtering algorithms are Edge, Sobel X, Sobel Y, Sobel X-Y, Blur, Smooth, Sharpen, Gaussian and Beta (HYB). Then, the … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 4 · 20 Feb 2012 · 8,021 accessesView PDFCite
Research ArticleOpen accessIn the keywordsSingle Core Hardware Module to Implement Boolean Function Classification TechniquesMohd. Marufuzzaman, Md. Mamun, Fazidah Hanim Hashim, Labonnah F. RahmanProblem statement: Boolean function classification plays an important role in the field like technology mapping for digital circuit design, function mapping for minimization and the development of universal logic modules. Approach: In this study, we present a single core hardware module to implement Boolean function classification techniques on Altera FLEX10K FPGA device for lossless data compression. The compression algorithm was … …American Journal of Applied Sciences, Vol. 8, Issue 11 · 7 Oct 2011 · 7,408 accessesView PDFCite
Research ArticleOpen accessIn the keywordsTeaching Computer Organization and Architecture Using Simulation and FPGA ApplicationsKasim M. Al-AubidyThis paper presents the design concepts and realization of incorporating micro-operation simulation and FPGA implementation into a teaching tool for computer organization and architecture. This teaching tool helps computer engineering and computer science students to be familiarized practically with computer organization and architecture through the development of their own instruction set, computer programming and interfacing experiments. A two-pass assembler has … …Journal of Computer Science, Vol. 3, Issue 8 · 31 Aug 2007 · 7,100 accessesView PDFCite
Research ArticleOpen accessIn the abstractReal-Time Endoscopic Image Semantic Segmentation for Efficient Polyp IdentificationM. Al-AsliThe advancement of endoscopic procedures has significantly enhanced diagnostic capabilities in polyp identification and removal, which is critical for colorectal cancer prevention. However, the success of these procedures hinges on the accuracy and speed of real-time image analysis. Traditional image processing methods often fail to provide timely and precise segmentation of endoscopic images. This paper presents the implementation of endoscopic … …Journal of Computer Science, Vol. 21, Issue 10 · 10 Dec 2025 · 2,397 accessesView PDFCite
Research ArticleOpen accessIn the abstractQuantization and Pipelined Hardware Implementation of Deep Neural Network ModelsEl Hadrami Cheikh Tourad, Mohsine EleuldjInrecent years, Deep Neural Networks (DNNs) have garnered much interest due toadvances in computational power and data availability. Indeed, DNNs presents a considerable advantage in several challenges, suchas classification problems and video analysis. Although, such accomplishmentleads to significantly increasing energy demands, computational expenses, andmemory capacity. In addition, current efficient DNNs may have more complex andextensive structures. As a result, implementing … …Journal of Computer Science, Vol. 18, Issue 11 · 26 Oct 2022 · 5,703 accessesView PDFCite
Research ArticleOpen accessIn the abstractImproved Fuzzy Logic Controller Implemented on FPGA Circuit for Photovoltaic SystemsAouatif Ibnelouad, Abdeljalil Elkari, Hassan Ayad, Mostafa MjahedTo be the photovoltaic arrays capable to transport the maximum power obtainable, it must be combined with Maximum Power Point Tracking (MPPT). To succeed, we will improve a Maximum Power Point Tracking (MPPT) method, based on intelligent technique such as Fuzzy Logic Controller (FLC), compared with a conventional method which is P&O. This improved method applied to a stand-alone photovoltaic … …Journal of Computer Science, Vol. 16, Issue 5 · 5 Jun 2020 · 7,520 accessesView PDFCite