2 articles for “90 nm PTM CMOS”

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Research ArticleOpen accessIn the keywordsA 10GHZ Low-Offset Dynamic Comparator for High-Speed and Lower-Power ADCSBakoune Pierre Hypolite, Wembe Tafo Evariste, Moukengue Imano AdolpheThis paper proposed a design of low-voltage Dynamic Comparator using 90 nm PTM CMOS technology for high-speed and Lower-power Analog to Digital Converter (ADC) applications. The double tail structure is employed as based for design new comparator with positive feedback due to best behavior in low-voltage that allows low delay time; decreases the offset voltage and power dissipation. Simulation results … …American Journal of Engineering and Applied Sciences, Vol. 12, Issue 2 · 6 May 2019 · 7,671 accessesView PDF Cite

Research ArticleOpen accessIn the abstractDesign and Analysis of SRAM Cell for Smart ApplicationPushkar Praveen, Rakesh Kumar SinghIn today's circuittechnology, power consumption and savings are key concerns. The driving reasonsbehind these innovations are portable devices that require high throughput andlow power dissipation, such as computers, phones, and Personal DigitalAssistants (PDAs). In portable devices, reducing or decreasing IC dissipatedpower through design optimization is a big problem, and restricted batterylifespan places very severe restrictions on overall power usage. In … …Journal of Computer Science, Vol. 18, Issue 9 · 17 Sep 2022 · 5,726 accessesView PDF Cite