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53 articles for “multiplication”
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Research ArticleOpen accessIn the abstractAssessment of Genetic Purity of Parental Lines of Hybrid Rice Using DNA-Based MarkersSunil Bhavsar, Twinkle Solanki, Suchita Amin, Neeru JainAssessment of hybrid seed genetic purity is one of the most important quality control parameters in hybrid seed production. With the objective of replacing the GOT with DNA based assays, Cytoplasmic Male Sterile (CMS), restorer and hybrid lines have been screened by means of microsatellite and Sequence Tagged Site (STS) markers. Cytoplasmic Male Sterile (CMS) lines often get contaminated with … …OnLine Journal of Biological Sciences, Vol. 15, Issue 2 · 13 Jun 2015 · 7,436 accessesView PDFCite
Research ArticleOpen accessIn the abstractBRASSINOSTEROIDS IN BREEDING TECHNOLOGIES HEALTHCARE POTATONatalia Nikolaevna Koposova, Olga Veniaminovna Shtyrlina, Irina Pavlovna Uromova et al.The regulator of anti-stress action Epin-Extra (24-epibrassinolide) was tested in laboratory and field (protected ground) conditions. The aim of this research was to study the influence of growth regulators on the growth, development and productivity of improved initial promising varieties of potato: Native (cultivated varieties Udacha) and foreign (cultivated varieties Red Scarlett) selections obtained by the method of apical meristem … …American Journal of Agricultural and Biological Sciences, Vol. 9, Issue 3 · 28 Aug 2014 · 7,322 accessesView PDFCite
Research ArticleOpen accessIn the abstractMULTI-DIMENTIONAL CLASSIFICATION OF TYPES AND FORMS OF CORPORATE EDUCATIONAlfiya Rafisovna Masalimova, Lidiya Leonidovna SabirovaThe task of this article is: To reveal the essence and content of the notion "corporate education"; to identify features of modern corporate education models; to develop classification of corporate education types and forms and to give their theoretical distifying. The research is based on a comparative approach, which allows to identify the features of the models, types and forms … …American Journal of Applied Sciences, Vol. 11, Issue 7 · 19 Apr 2014 · 7,044 accessesView PDFCite
Research ArticleOpen accessIn the abstractAdaptive Channel Equalization Using Multiplicative Neural Network for Rayleigh Faded ChannelP. Sivakumar, N. Chithra, S. N. Sivanandam, M. RajaramProblem statement: Digital transmission over band-limited communication channel largely suffers from ISIS and various noise sources. The presence of ISI and noise causes bit errors in the received signal. Equalization is necessary at the receiver to overcome these channel impairment to recover the original transmitted sequence. Traditionally equalization is considered as equivalent to inverse filtering and implemented using linear-perform under … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,931 accessesView PDFCite
Research ArticleOpen accessIn the abstractBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDFCite
Research ArticleOpen accessIn the abstractParallel Calculation Sensitivity Function for Multi Tasking EnvironmentsHamed Al Rjoub, Ahmed Al-Sha'orProblem statement: Calculating sensitive functions for a large dimension control system to find the unknowns vectors for a linear system in both single and multi processors, is not considered internally compatible with multi tasking environments, so breaking the process can cost time and memory and it couldn't be paused, resumed and saved as patterns for later continuity. This study is … …Journal of Computer Science, Vol. 6, Issue 1 · 31 Aug 2010 · 6,445 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Multiplier Design Using Latches and Flip-FlopsC. N. Marimuthu, P. ThangarajProblem statement: Power dissipation is designated as critical parameter in modern VLSI design field. In VLSI implementation low power concept is necessary to meet Moore’s law and to produce consumer electronics with more back up and less weight. To save significant power consumption of a VLSI design, it is a good direction to reduce its dynamic power which is the … …Journal of Computer Science, Vol. 6, Issue 10 · 30 Jul 2010 · 7,372 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,123 accessesView PDFCite
Research ArticleOpen accessIn the abstractEEG Signals During Epileptic Seizure as a Semigroup of Upper Triangular MatricesFaisal Abdurabu Mubarak Binjadhnan, Tahir AhmadProblem statement: EEG signals during epileptic seizure can be presented as an algebraic structure, namely semigroup of upper triangular matrices. Approach: EEG signals during seizure were recorded and composed into set of matrices. They were transformed into upper triangular matrices using QR-Schur decomposition and finally as a semigroup of upper triangular matrices. Results: EEG signals during epileptic seizure were transformed … …American Journal of Applied Sciences, Vol. 7, Issue 4 · 30 Apr 2010 · 7,019 accessesView PDFCite
Research ArticleOpen accessIn the abstractHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDFCite