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105 results for “Low Power Design”
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Research ArticleOpen accessIn the abstractPERFORMANCE ANALYSIS OF HIGH EFFICIENT AND LOW POWER ARCHITECTURE FOR FUZZY BASED IMAGE FUSIONS. Anbumozhi, P. S. ManoharanImage fusion based on wavelet transform is the most commonly used image fusion method, which fuses the source images’ information in wavelet domain according to some fusion rules. But because of the uncertainties of the source images’ contributions to the fused image, how to design a good fusion rule to integrate as much information as possible into the fused image … …American Journal of Applied Sciences, Vol. 11, Issue 5 · 21 Feb 2014 · 6,753 accessesView PDFCite
Research ArticleOpen accessIn the abstractNOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATESM. Saravanan, K. Suresh ManicMultipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,706 accessesView PDFCite
Research ArticleOpen accessIn the abstractALL OPTICAL IMPLEMENTATION OF HIGH SPEED AND LOW POWER REVERSIBLE FULL ADDER USING SEMICONDUCTOR OPTICAL AMPLIFIER BASED MACH-ZEHNDER INTERFEROMETERR. M. Bommi, S. Selvakumar RajaIn the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversible Full … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,669 accessesView PDFCite
Research ArticleOpen accessIn the abstractPERFORMANCE ANALYSIS OF HIGH EFFICIENCY LOW DENSITY PARITY-CHECK CODE DECODER FOR LOW POWER APPLICATIONSM. Revathy, R. SaravananIn this study, we propose a low power, high efficient Low Density Parity-Check Code (LDPC) Decoder Architecture for error detection and correction applications. LDPC codes have been adopted in latest wireless standards such as satellite and mobile communications since they possess superior error-detecting and correcting capabilities. As technology scales, memory devices become larger and more powerful and low power consumption … …American Journal of Applied Sciences, Vol. 11, Issue 4 · 30 Jan 2014 · 6,882 accessesView PDFCite
Research ArticleOpen accessIn the abstractDESIGN OF OPTIMAL CARRY SKIP ADDER AND CARRY SKIP BCD ADDER USING REVERSIBLE LOGIC GATESPraveena Murugesan, Thanushkodi KeppanagounderReversible logic circuits have the ability to produce zero power dissipation which has found its importance in quantum computing, optical computing and low power digital circuits. The study presents improved and efficient reversible logic circuits for carry skip adder and carry skip BCD adder. The performance of the proposed architecture is better than the existing works in terms of gate … …Journal of Computer Science, Vol. 10, Issue 5 · 26 Dec 2013 · 6,677 accessesView PDFCite
Research ArticleOpen accessIn the abstractC-LOAD POWER CONTROL PROTOCOL-CROSS-LAYER DESIGN OF A NETWORK LAYER LOAD POWER CONTROL PROTOCOL IN WIRELESS AD HOC NETWORKSA. Arivoli, P. NarayanasamyIn wireless ad hoc network scenario, Cross-layer design is emerging, important in wireless ad hoc network and the power control methods. Power control is the intelligent selection of transmit power in a communication to achieve the better performance within the system. Cross-layer is used to sharing the information between the layers. Physical to Transport layer information are shared in this … …Journal of Computer Science, Vol. 10, Issue 3 · 30 Nov 2013 · 7,148 accessesView PDFCite
Research ArticleOpen accessIn the abstractAN IMPROVED DESIGN OF REVERSIBLE BINARY TO BINARY CODED DECIMAL CONVERTER FOR BINARY CODED DECIMAL MULTIPLICATIONPraveena Murugesan, Thanushkodi KeppanagounderReversible logic gates under ideal conditions produce zero power dissipation. This factor highlights the usage of these gates in optical computing, low power CMOS design, quantum optics and quantum computing. The growth of decimal arithmetic in various applications as stressed the need to propose the study on reversible binary to BCD converter which plays a greater role in decimal multiplication … …American Journal of Applied Sciences, Vol. 11, Issue 1 · 28 Nov 2013 · 7,510 accessesView PDFCite
Research ArticleOpen accessIn the abstractDESIGN IMPLEMENTATION AND HARDWARE STRUCTURE FOR IMAGE ENHANCEMENT AND SURFACE ROUGHNESS WITH FEATURE EXTRACTION USING DISCRETE WAVELET TRANSFORMSyed Jahangir Badashah, P. SubbaiahIn this study we provide the implementation design and hardware structure for the architecture proposed in the previous paper &#34Image Enhancement and Surface Roughness with Feature Extraction using DWT&#34 IEEE DoI/10.1049/cp.2011.0464. The proposed architecture has been implemented in Microwind and Tanner for power analysis and characteristic study. The result shows very low power consumption than the existing method for a … …Journal of Computer Science, Vol. 10, Issue 2 · 20 Nov 2013 · 6,780 accessesView PDFCite
Research ArticleOpen accessIn the abstractUltra Low Power Single Edge Triggered Delay Flip Flop Based Shift Registers Using 10-Nanometer Carbon Nano Tube Field Effect TransistorRavi Thiyagarajan, Kannan VeerappanCarbon Nano Tube Field Effect Transistor is currently considered as promising successor of Metal Oxide Semiconductor Field Effect Transistor. The scaling down of the Metal Oxide Semiconductor device faced serious limits like short channel effect, tunnelling through gate oxide layer, associated leakage currents and power dissipation when its dimension shrink down to 22 nanometer range. Further scaling of Metal Oxide … …American Journal of Applied Sciences, Vol. 10, Issue 12 · 14 Oct 2013 · 6,749 accessesView PDFCite
Research ArticleOpen accessIn the abstractACKA 500 WATT POWER AMPLIFIER FOR A 144 MHZ CHANNEL BASED ON A VHF PUSH-PULL POWER MOS TRANSISTORAgus Harjoko, Tri Wahyu SupardiIn a wireless communication, a signal power amplifier is needed to carry signals over a long distance. Many signal amplifiers are made of tube as the amplifying component and as such they suffer low efficiency. This study presents results of the research on designing and implementing solid state 144MHz signal amplifier employing MOSFET BLF278 as the active component of the … …Journal of Computer Science, Vol. 9, Issue 10 · 5 Sep 2013 · 7,615 accessesView PDFCite