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23 results for “digital circuit design”

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Research ArticleOpen accessAll words, across the recordA Wireless Sensor Node Supporting Various Powers Supply and Communication MethodsStefan Gruber, Hannes Reinisch, Hartwig Unterassinger et al.Problem statement: This study presents a wireless sensor node dedicated for in-tire pressure and temperature monitoring. Additional features set it apart from the many different systems available on the highly competitive market. State-of-the-art implementations are mounted on the rim of a tire. Here the sensor node will be mounted on the inner liner of the tire. By moving the sensor … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 4 · 12 Jan 2012 · 8,035 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,680 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,129 accessesView PDFCite