24 results for “VHDL”

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Research ArticleOpen accessIn the abstractA Single Core Hardware Module of a Data Compression Scheme Using Prediction by Partial Matching TechniqueJubayer Jalil, Md. Mamun, Mohd. Marufuzzaman, Hafizah HusainProblem statement: Compression is useful because it helps reduce the consumption of expensive resources, such as hard disk space or transmission bandwidth. For effective data compression, the compression algorithm must be able to predict future data accurately in order to build a good probabilistic model for compression. Lossless compression is essential in cases where it is important that the original … …American Journal of Applied Sciences, Vol. 8, Issue 11 · 7 Oct 2011 · 7,255 accessesView PDF Cite

Research ArticleOpen accessIn the abstractSubway Train Braking System: A Fuzzy Based Hardware ApproachMamun Bin Ibne Reaz, Jubayer Jalil, Hafizah Husain, Badariah BaisProblem statement: Automated subway train-braking system require perfection, efficiency and fast response. In order to cope with this concerns, an appropriate algorithm need to be developed which need to be implemented in hardware for faster response. Approach: In this research, the FPGA realization of fuzzy based subway train braking system has been presented on an Alter FLEX10K device to provide … …American Journal of Applied Sciences, Vol. 8, Issue 7 · 24 Jun 2011 · 7,175 accessesView PDF Cite

Research ArticleOpen accessIn the abstractDesign of a Neural Networks Classifier for Face DetectionF. Smach, M. Atri, J. Mitéran, M. AbidFace detection and recognition has many applications in a variety of fields such as security system, videoconferencing and identification. Face classification is currently implemented in software. A hardware implementation allows real-time processing, but has higher cost and time to-market. The objective of this work was to implement a classifier based on neural networks MLP (Multi-layer Perception) for face detection. The … …Journal of Computer Science, Vol. 2, Issue 3 · 31 Mar 2006 · 6,885 accessesView PDF Cite

Research ArticleOpen accessIn the abstractAsynchronous NoC Router DesignSami Badrouchi, Abdelkrim Zitouni, Kholdoun Torki, Rached TourkiThe Quality of Service Network on Chip (QNoC) is the most perferment solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents an asynchronous NoC router, for use in 2-D mesh-connected networks. It comprises multiple interconnected input and output ports and dynamic arbitration mechanisms that resolve any output port conflicts based on the … …Journal of Computer Science, Vol. 1, Issue 3 · 30 Sep 2005 · 7,414 accessesView PDF Cite