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28 results for “Processor Architecture”

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Research ArticleOpen accessIn the abstractIrregular Class of Multistage Interconnection Network in Parallel ProcessingSandeep Sharma, K. S. Kahlon, P. K. Bansal, Kawaljeet SinghA major problem in designing a large-scale parallel and distributed system was the construction of an Interconnection Network (IN) to provide inter-processor communication. One of the biggest issues in the development of such a system was the development of an effective architecture and algorithms that have high reliability, give good performance (even in the presence of faults), low cost, low … …Journal of Computer Science, Vol. 4, Issue 3 · 31 Mar 2008 · 7,057 accessesView PDFCite
Research ArticleOpen accessIn the abstractDynamically Reconfigurable Embedded Architecture-An Alternative To Application-Specific Digital Signal Processing ArchitecturesN. Ramadass, S. Natarajan, J. Raja Paul PerinbamEmerging trends in design of real-time digital signal processing systems indicate that in the future, a significant amount of performance improvement can be achieved using dynamically reconfigurable embedded architectures consisting of reconfigurable, general-purpose components. Although embedded real-time systems have long been prevailing in our society, no firm scientific base has been established yet to handle timing requirements in a systematic … …Journal of Computer Science, Vol. 3, Issue 10 · 31 Oct 2007 · 6,727 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS TechnologySiva Kumar Palaniappan, Tun Zainal Azni ZulkifliThis paper introduces detail design of semi-custom CMOS Fast Fourier Transform (FFT) architecture for computing 16-point radix-4 FFT. FFT is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication application as an important block for various multi-carrier systems such as for WLAN (Wireless local area network). This paper describes … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,164 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Hardware Implementation of High Speed FFT CoreM. Kannan, S. K. SrivatsaApplications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power. This paper proposes the implementation of radix-4 based parallel-pipelined Fast Fourier Transform processor which incorporates a low power commutator, butter-fly with multiplier-less architecture. The proposed parallel pipelined architectures have the advantages of high throughput and low power consumption. The multiplier-less architecture uses shift … …Journal of Computer Science, Vol. 3, Issue 6 · 30 Jun 2007 · 7,227 accessesView PDFCite
Research ArticleOpen accessIn the abstractComputer Simulator: An Educational Tool for Computer ArchitectureMihyar HessonThe great advancement in computer architecture and cache memory design and technology had a considerable influence on the way computer architecture was taught in universities. This requires students to be able to visualize the detailed activities that take place within a computer processor and its interaction with memory system. Computer simulators could effectively be used to enhance the understanding and … …American Journal of Applied Sciences, Vol. 3, Issue 11 · 30 Nov 2006 · 7,468 accessesView PDFCite
Research ArticleOpen accessIn the abstractHighly Efficient Elliptic Curve Crypto-Processor with Parallel GF(2m) Field MultipliersTurki F. Al-Somani, M. K. Ibrahim, Adnan GutubThis study presents a high performance GF(2m) Elliptic Curve Crypto-processor architecture. The proposed architecture exploits parallelism at the projective coordinate level to perform parallel field multiplications. In the proposed architecture, normal basis representation is used. Comparisons between the Projective, Jacobian and Mixed coordinate systems using sequential and parallel designs are presented. Results show that parallel designs using normal basis gives … …Journal of Computer Science, Vol. 2, Issue 5 · 31 May 2006 · 6,874 accessesView PDFCite
Research ArticleOpen accessIn the abstractField Programmable Gate Array -Based System-on-Chip for Real-Time Power Process ControlAhmed Karim Ben Salem, Slim Ben Othman, Slim Ben SaoudProblem Statement: Nowadays Real-Time (RT) embedded control applications require not just higher performance but more flexibility as well without increasing cost and resources. Approach: In this study we presented a promising co-design and implementation of control solution. We developed flexible solution using software control algorithms coupled with an embedded RT kernel on powerful embedded processor cores, combined with reconfigurable logic … …American Journal of Applied Sciences, Vol. 7, Issue 1 · 31 Jan 2010 · 7,455 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordThe Optimal Implementation of a Generator of SinusoidSouhila Boudjema, Kaddour SaouchiThe embedded systems occupy a place increasingly important in our daily life. In recent years much of research it is focused on the miniaturization of the various electronic devices. In this study we present the architecture of a digital generator of frequency based on trigonometrically algorithm to obtain sample high frequencies. We treat a comparative study between various processors CORDIC: … …American Journal of Applied Sciences, Vol. 12, Issue 8 · 17 Sep 2015 · 6,292 accessesView PDFCite