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28 results for “Processor Architecture”
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Research ArticleOpen accessIn the abstractA CASE FOR HYBRID INSTRUCTION ENCODING FOR REDUCING CODE SIZE IN EMBEDDED SYSTEM-ON-CHIPS BASED ON RISC PROCESSOR CORESGovindarajalu Bakthavatsalam, K. M. MehataEmbedded computing differs from general purpose computing in several aspects. In most embedded systems, size, cost and power consumption are more important than performance. In embedded System-on-Chips (SoC), memory is a scarce resource and it poses constraints on chip space, cost and power consumption. Whereas fixed instruction length feature of RISC architecture simplifies instruction decoding and pipeline implementation, its undesirable … …Journal of Computer Science, Vol. 10, Issue 3 · 23 Nov 2013 · 6,825 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign an Advance Computer-Aided Tool for Image Authentication and ClassificationRozita Teymourzadeh, Amirize Alpha Laadi, Yazan Samir Algnabi et al.Over the years, advancements in the fields of digital image processing and artificial intelligence have been applied in solving many real-life problems. This could be seen in facial image recognition for security systems, identity registrations. Hence a bottleneck of identity registration is image processing. These are carried out in form of image preprocessing, image region extraction by cropping, feature extraction … …American Journal of Applied Sciences, Vol. 10, Issue 7 · 24 Jun 2013 · 6,561 accessesView PDFCite
Research ArticleOpen accessIn the abstractEvaluation of Various Compiler Optimization Techniques Related to Mibench Benchmark ApplicationsJeyaraj Andrews, Thangappan SasikalaTuning compiler optimization for a given application of particular computer architecture is not an easy task, because modern computer architecture reaches higher levels of compiler optimization. These modern compilers usually provide a larger number of optimization techniques. By applying all these techniques to a given application degrade the program performance as well as more time consuming. The performance of the … …Journal of Computer Science, Vol. 9, Issue 6 · 6 Jun 2013 · 7,219 accessesView PDFCite
Research ArticleOpen accessIn the abstractPerformance Analysis of Message Passing Interface Collective Communication on Intel Xeon Quad-Core Gigabit Ethernet and Infiniband ClustersRoswan Ismail, Nor Asilah Wati Abdul Hamid, Mohamed Othman, Rohaya LatipThe performance of MPI implementation operations still presents critical issues for high performance computing systems, particularly for more advanced processor technology. Consequently, this study concentrates on benchmarking MPI implementation on multi-core architecture by measuring the performance of Open MPI collective communication on Intel Xeon dual quad-core Gigabit Ethernet and InfiniBand clusters using SKaMPI. It focuses on well known collective communication … …Journal of Computer Science, Vol. 9, Issue 4 · 9 May 2013 · 7,206 accessesView PDFCite
Research ArticleOpen accessIn the abstractGate Replacement Technique for Reducing Leakage Current in Wallace Tree MultiplierNaveen Raman, ThanushkodiLeakage power has become more significant in the power dissipation of today’s CMOS circuits. This affects the portable battery operated devices directly. The multipliers are the main key for designing an energy efficient processor, where the multiplier design decides the digital signal processors efficiency. In this study gate replacement technique is used to reduce the leakage power in 4×4 Wallace … …Journal of Computer Science, Vol. 9, Issue 2 · 30 Mar 2013 · 6,763 accessesView PDFCite
Research ArticleOpen accessIn the abstractAn Investigation of Using Parallel Genetic Algorithm for Solving the Shortest Path Routing ProblemSalman Yussof, Rina Azlin Razali, Ong Hang SeeProblem statement: Shortest path routing is the type of routing widely used in computer network nowadays. Even though shortest path routing algorithms are well established, other alternative methods may have their own advantages. One such alternative is to use a GA-based routing algorithm. According to previous researches, GA-based routing algorithm has been found to be more scalable and insensitive to … …Journal of Computer Science, Vol. 7, Issue 2 · 25 Feb 2011 · 7,617 accessesView PDFCite
Research ArticleOpen accessIn the abstractHardware Implementation of a Genetic Algorithm Based Canonical Singed Digit Multiplierless Fast Fourier Transform Processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband ApplicationsMahmud Benhamid, Masuri B. OthmanProblem statement: Ultra Wide Band (UWB) technology has attracted many researchers' attention due to its advantages and its great potential for future applications. The physical layer standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB system is defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 … …Journal of Mathematics and Statistics, Vol. 5, Issue 4 · 31 Dec 2009 · 7,515 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Software Agent for Speech Abiding SystemsR. Manoharan, K. Vivekanandan, V. SundaramProblem statement: In order to bring speech into the mainstream of business process an efficient digital signal processor is necessary. The Fast Fourier Transform (FFT) and the butter fly structure symmetry will enable the harwaring easier. With the DSP and software proposed, togetherly established by means of a system, named here as “Speech Abiding System (SAS)”, a software agent, which … …Journal of Computer Science, Vol. 5, Issue 2 · 28 Feb 2009 · 7,744 accessesView PDFCite
Research ArticleOpen accessIn the abstractEfficient Reversible Montgomery Multiplier and Its Application to Hardware CryptographyNoor Muhammed Nayeem, Lafifa Jamal, Hafiz Md. Hasan BabuProblem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not … …Journal of Computer Science, Vol. 5, Issue 1 · 31 Jan 2009 · 7,852 accessesView PDFCite
Research ArticleOpen accessIn the abstractDSP-128:Stream Cipher Based On Discrete Log Problem And Polynomial ArithmeticKhaled M. Suwais, Azman SamsudinDSP-128 is a new multithreaded stream cipher based on the intractability of the Discrete Logarithm Problem (DLP) with key size of 128-bit. The design of DSP-128 is divided into three stages: Initialization Stage, Keystream Generation Stage, and Encryption Stage. The design goal of DSP-128 is to come up with a secure stream cipher with good performance for data encryption. The … …American Journal of Applied Sciences, Vol. 5, Issue 7 · 31 Jul 2008 · 7,396 accessesView PDFCite