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Journal of Computer Science

ISSN 1549-3636 (print)eISSN 1552-6607 (online) Open access
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Research Article · Open access · Published 7 June 2012

A Quasi Delay Insensitive Reduced Stack Pre-Charged Half Buffer based High Speed Adder using pipeline templates for Asynchronous Circuits

D. Jayanthi, M. Rajaram
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  1. doi:10.70675/54eeb32dzee04z4974zb80az318fe18ed609Found 8 October 2026