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Research Article · Open access · Published 18 July 2011

Efficient Realization of S-Box based reduced Residue of Prime Numbers using Virtex-5 and Virtex-6 FPGAs

Mohammed H. Al Mijalli
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Citing articles (3)

Read from Crossref’s cited-by service every week, newest first.

  1. doi:10.1186/s42787-020-0068-zFound 12 June 2020
  2. doi:10.1007/978-3-642-35326-0_51Found 12 June 2020
  3. doi:10.1109/icces.2013.6707202Found 12 June 2020