Sign inSubmit
Tips: “quotes” for a phrase · author:Lee · a DOI goes straight to its article

11 articles for “VLSI design process”
Set a search alert
Research ArticleOpen accessIn the keywordsFramework for Managing the Very Large Scale Integration Design ProcessSabah Al-Fedaghi, Eman Al-DwaisanProblem statement: The VLSI design cycle was described in terms of successive states and substages; it starts with system specification and ends with packaging. At the next descriptive level, currently known methodologies (e.g., flowchart based, object-oriented based) lack a global conceptual representation suitable for managing the VLSI design process. Technical details were intermixed with tool-dependent and implementation issues such as … …American Journal of Applied Sciences, Vol. 9, Issue 2 · 13 Dec 2011 · 7,491 accessesView PDFCite
Research ArticleOpen accessIn the abstractHigh Performance and Low Leakage 3DSOI Fin-FET SRAMD. Sudha, Ch. Santhirani, Sreenivasa Rao IjjadaIn recent semiconductor designs, the major key factors: Competent device simulations, precise device characterization, well power optimization, new architectural design and cost-effective fabrication drives the designers attention towards multi gate transistors as an alternative to MOSFET. Non planner device structures are a competitive edge over planner devices. Silicon-on-Insulator (SOI) FinFETs are hopeful among variety of multi-gate structures as they have … …American Journal of Engineering and Applied Sciences, Vol. 10, Issue 1 · 9 Feb 2017 · 7,346 accessesView PDFCite
Research ArticleOpen accessIn the abstractVLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select AdderS. Karunakaran, N. KasthuriRecent advances in mobile computing and multimedia applications demand high-performance and low-power VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital Finite Impulse … …American Journal of Applied Sciences, Vol. 9, Issue 12 · 5 Jan 2013 · 7,179 accessesView PDFCite
Research ArticleOpen accessIn the abstractAn Optimized Device Sizing of Analog Circuits using Particle Swarm OptimizationP. Prem Kumar, K. DuraiswamyProblem statement: Day by day more and more products rely on analog circuits to improve the speed and reduce the power consumption(Products rely on analog circuits to improve the speed and reduce the power consumption day by day more and more.). For the VLSI implementation analog circuit design plays an important role. This analog circuit synthesis might be the most … …Journal of Computer Science, Vol. 8, Issue 6 · 19 Mar 2012 · 7,769 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of an Error Tolerant AdderA. N. Jayanthi, C. S. RavichandranProblem statement: In modern VLSI technology, the occurrence of all kinds of errors has become inevitable. By adopting an emerging concept in VLSI design and test, Error Tolerance (ET), a novel Error-Tolerant Adder (ETA) is proposed. The ETA is able to ease the strict restriction on accuracy and at the same time achieve tremendous improvements in both the power consumption … …American Journal of Applied Sciences, Vol. 9, Issue 6 · 13 Mar 2012 · 7,249 accessesView PDFCite
Research ArticleOpen accessIn the abstractHardware Implementation of a Genetic Algorithm Based Canonical Singed Digit Multiplierless Fast Fourier Transform Processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband ApplicationsMahmud Benhamid, Masuri B. OthmanProblem statement: Ultra Wide Band (UWB) technology has attracted many researchers' attention due to its advantages and its great potential for future applications. The physical layer standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB system is defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 … …Journal of Mathematics and Statistics, Vol. 5, Issue 4 · 31 Dec 2009 · 7,515 accessesView PDFCite
Research ArticleOpen accessIn the abstractSingle-Electron Transistor (SET) Process and Device Simulation Using SYSNOPSYS TCAD ToolsUda Hashim, Amiza RasmiSimulation of semiconductor device fabrication and operation is important to the design and manufacture of integrated circuits because it provides insights into complex phenomena that cannot obtained through experimentation or simple analytic models. Process and device simulation is commonly using for the design of new very large scale integration (VLSI) devices and processes. Simulation programs serves as exploratory tools in … …American Journal of Applied Sciences, Vol. 3, Issue 7 · 31 Jul 2006 · 7,418 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordNOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATESM. Saravanan, K. Suresh ManicMultipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,706 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordParallel Memetic Algorithm for VLSI Circuit Partitioning Problem using Graphical Processing UnitsP. Subbaraj, P. SivakumarProblem statement: Memetic Algorithm (MA) is a form of population-based hybrid Genetic Algorithm (GA) coupled with an individual learning procedure capable of performing local refinements. Here we used genetic algorithm to explore the search space and simulated annealing as a local search method to exploit the information in the search region for the optimization of VLSI netlist bi-Partitioning problem. However, … …Journal of Computer Science, Vol. 8, Issue 5 · 27 Feb 2012 · 7,090 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordVLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless ReceiversRozita Teymourzadeh, Yazan Samir Algnabi, Masuri Othman et al.Problem statement: The need for high performance transceiver with high Signal to Noise Ratio (SNR) has driven the communication system to utilize latest technique identified as over sampling systems. It was the most economical modulator and decimation in communication system. It has been proven to increase the SNR and is used in many high performance systems such as in the … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 5 Nov 2010 · 7,815 accessesView PDFCite