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24 articles for “VHDL”
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Research ArticleOpen accessEvery word in the titlePerformance Analysis of a 32-Bit Multiplier with a Carry-Look-Ahead Adder and a 32-bit Multiplier with a Ripple Adder using VHDLHasan Krad, Aws Y. Al-TaieThis study presents a performance analysis of two different multipliers for unsigned data, one uses a carry-look-ahead adder and the second one uses a ripple adder. The study's main focus is on the speed of the multiplication operation on these 32-bit multipliers which are modeled using VHDL, A hardware description language. The multiplier with a carry-look-ahead adder has shown a … …Journal of Computer Science, Vol. 4, Issue 4 · 30 Apr 2008 · 7,385 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleVHDL Specification Methodology from High-level SpecificationM. Benmohammed, S. MernizDesign complexity has been increasing exponentially this last decade. In order to cope with such an increase and to keep up designers' productivity, higher level specifications were required. Moreover new synthesis systems, starting with a high level specification, have been developed in order to automate and speed up processor design. This study presents a VHDL specification methodology aimed to extend … …Journal of Computer Science, Vol. 1, Issue 2 · 30 Jun 2005 · 6,937 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleVHDL DESIGN AND HARDWARE REALIZATION OF HYBRIDARTIFICIAL INTELLIGENCE ARCHITECTURERajeswaran Nagalingam, Tenneti Madhu, Munagala SuryakalavathiEvolutionary Algorithms (EA) use Genetic Algorithm (GA) in many optimization problems to efficiently compute the function value in less time. In this study the weight optimization of the Artificial Neural Net-work (ANN), using the Back Propagation Network (BPN), is tested and presented with GA. The combined architecture of Neuro-Genetic (Hybrid Artificial Intelligence) approach is proposed and simulated results are provided … …American Journal of Applied Sciences, Vol. 11, Issue 5 · 24 Feb 2014 · 6,566 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleVHDL Modeling, Simulation and Prototyping of a Novel Arbitrary Signal Generation SystemS. A. Abbasi, A. R.M. Alamoud, J.M. Al ShahraniProblem statement: Arbitrary signal generators play an important role in many applications. Several different techniques utilizing both analog and digital approaches are being used for the generation of periodic signals. However, all of them suffer from many drawbacks. In this study, we present modeling, simulation and prototyping of a novel periodic arbitrary signal generation system using FPGAs. The proposed system … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 5 Nov 2010 · 7,755 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Approach of a Multipurpose Finite Impulse Response Filter for Real-Time Filtering ApplicationsMd. Syedul Amin, Md. Mamun, Labonnah F. RahmanProblem statement: Finite Impulse Response (FIR) filters are widely used in various DSP applications. The design of digital FIR filters is a very basic problem in digital signal processing. A FIR filter with multiple operation capability is certainly very useful for any real-time filtering applications. This article presents a multipurpose FIR filter design modeled by the hardware description language VHDL … …American Journal of Applied Sciences, Vol. 8, Issue 12 · 11 Oct 2011 · 7,150 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Implementation of Novel Artificial Neural Network Based Stock Market Forecasting System on Field-Programmable Gate ArraysMd. Syedul Amin, Md. Mamun, Fazida Hanim Hashim et al.Problem statement: Multiagent system is very proficient and has rules well-suited for financial forecast with its neural network. In financial forecasting, the approach for rules extractions is less pertinent and involves algorithms which are complex. The unsupervised network method lacks in comprehensibility and leads to ambiguity. Approach: The application of neural network technology to real-time processing of financial market analysis … …American Journal of Applied Sciences, Vol. 8, Issue 10 · 12 Sep 2011 · 7,627 accessesView PDFCite
Research ArticleOpen accessIn the keywordsEfficient Realization of S-Box based reduced Residue of Prime Numbers using Virtex-5 and Virtex-6 FPGAsMohammed H. Al MijalliProblem statement: The S-Box transformation is a computationally intensive and important operation of the Advanced Encryption Standard (AES). Approach: This study presents the comparative study between reduced Residue of Prime Numbers and Galois Filed GF (28) based SBoxes using Virtex-5 and Virtex-6 FPGA devices. The implementation of S-Boxes is done using Very High speed integrated circuit Hardware Description Language (VHDL). … …American Journal of Applied Sciences, Vol. 8, Issue 8 · 18 Jul 2011 · 6,975 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley MultipliersMuhammad H. Rais, Bandar M. Al-Harthi, Saad I. Al-Askar, Fahad K. Al-HusseinProblem statement: As growing demands on portable computing and communication systems, the power-efficient multipliers play an important role. In these multipliers basic multiplication follows the Baugh-Wooley algorithms and can easily be implemented using Field Programmable Gate Array (FPGA) devices because the development cost for Application Specific Integrated Circuits (ASICs) are high. These algorithms should be verified and optimized before implementation. … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 2 · 30 Jun 2010 · 8,123 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign and Simulation of an Input Queuing Packet SwitchAzeddine Bilami, Mustapha Lalam, Mohamed BenmohammedMany Architectures of Internet routers, ATM and Ethernet switches have been proposed and analysed in literature. Theoretically reliable and valid solutions have been developed to achieve high performances, but a lot of them are not feasible in practice for commercial and technological reasons. Few papers develop the implementation and simulation aspects. The objective of this study is the design of … …Journal of Computer Science, Vol. 1, Issue 3 · 19 Sep 2005 · 6,926 accessesView PDFCite