Research ArticleOpen accessEvery word in the titleSingle-Electron Transistor (SET) Process and Device Simulation Using SYSNOPSYS TCAD ToolsUda Hashim, Amiza RasmiSimulation of semiconductor device fabrication and operation is important to the design and manufacture of integrated circuits because it provides insights into complex phenomena that cannot obtained through experimentation or simple analytic models. Process and device simulation is commonly using for the design of new very large scale integration (VLSI) devices and processes. Simulation programs serves as exploratory tools in … …American Journal of Applied Sciences, Vol. 3, Issue 7 · 31 Jul 2006 · 7,418 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHigh Performance and Low Leakage 3DSOI Fin-FET SRAMD. Sudha, Ch. Santhirani, Sreenivasa Rao IjjadaIn recent semiconductor designs, the major key factors: Competent device simulations, precise device characterization, well power optimization, new architectural design and cost-effective fabrication drives the designers attention towards multi gate transistors as an alternative to MOSFET. Non planner device structures are a competitive edge over planner devices. Silicon-on-Insulator (SOI) FinFETs are hopeful among variety of multi-gate structures as they have … …American Journal of Engineering and Applied Sciences, Vol. 10, Issue 1 · 9 Feb 2017 · 7,346 accessesView PDFCite
Research ArticleOpen accessIn the abstractDFM of Strained-Engineered MOSFETs Using Technology CADT. K. Maiti, C. K. MaitiProblem statement: In this study, a systematic study based on Technology CAD (TCAD) was taken up for the design and Virtual Wafer Fabrication (VWF) of strain-engineered MOSFETs in Si CMOS technology. Approach: A simple manufacturable process recipe was developed to induce uniaxial stress in channel region to obtain enhanced performance in CMOS in 45 nm technology node. Results: Using Synopsys … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 5 Nov 2010 · 7,661 accessesView PDFCite