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22 articles for “FFT”
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Research ArticleOpen accessEvery word in the titleImplementation of Low-Memory Reference FFT on Digital Signal ProcessorYi-Pin Hsu, Shin-Yu LinProblem statement: In order to improve and implement Fast Fourier Transform (FFT), in general, an efficient parallel form in digital signal processor is necessary. The butterfly structure is an important role in FFT, because its symmetry form is suitable for hardware implementation. Although it can perform a symmetric structure, the performance will be reduced under the data-dependent flow characteristic. Even … …Journal of Computer Science, Vol. 4, Issue 7 · 31 Jul 2008 · 7,142 accessesView PDFCite
Research ArticleOpen accessEvery word in the titleLow Power Hardware Implementation of High Speed FFT CoreM. Kannan, S. K. SrivatsaApplications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power. This paper proposes the implementation of radix-4 based parallel-pipelined Fast Fourier Transform processor which incorporates a low power commutator, butter-fly with multiplier-less architecture. The proposed parallel pipelined architectures have the advantages of high throughput and low power consumption. The multiplier-less architecture uses shift … …Journal of Computer Science, Vol. 3, Issue 6 · 30 Jun 2007 · 7,227 accessesView PDFCite
Research ArticleOpen accessIn the keywordsPerformance Analysis of Discrete Wavelet Transform Based Multiple Input Multiple Output Orthogonal Frequency Division Multiplexing System for Different Wavelets in Different Channel EnvironmentHariprasadNagarajan, AlameluNachiappanMultiple Input Multiple Output (MIMO) and Orthogonal Frequency Division Multiplexing (OFDM) are the two assuring technologies that offers high data rate as required for the 4G wireless systems. Conventionally OFDM is Fast Fourier Transform (FFT) based system. It uses IFFT (Inverse FFT) blocks in the transmitter and FFT blocks in the receiver. OFDM combined with MIMO gives increased throughput and … …American Journal of Applied Sciences, Vol. 10, Issue 12 · 18 Oct 2013 · 6,616 accessesView PDFCite
Research ArticleOpen accessIn the keywordsBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDFCite
Research ArticleOpen accessIn the keywordsImproving the Performance of Multivariate Bernoulli Model based Documents Clustering Algorithms using Transformation TechniquesPerumal Pitchandi, Nedunchezhian RajuProblem statement: Document clustering is the most important areas of data mining since they are very much and currently the subject of significant global research since such areas strengthen the enterprises of web intelligence, web mining, web search engine design and so forth. Generative models based on the multivariate Bernoulli and multinomial distributions have been widely used for text classification. … …Journal of Computer Science, Vol. 7, Issue 5 · 7 May 2011 · 7,281 accessesView PDFCite
Research ArticleOpen accessIn the keywordsOn-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for Fast Fourier Transform ArchitectureYazan Samir Algnabi, Rozita Teymourzadeh, Masuri Othman et al.Problem statement: The need for wireless communication has driven the communication systems to high performance. However, the main bottleneck that affects the communication capability is the Fast Fourier Transform (FFT), which is the core of most modulators. Approach: This study presented on-chip implementation of pipeline digit-slicing multiplier-less butterfly for FFT structure. The approach taken; in order to reduce computation complexity … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 4 · 30 Nov 2010 · 8,010 accessesView PDFCite
Research ArticleOpen accessIn the keywordsOn-Chip Implementation of High Resolution High Speed Floating Point Adder/Subtractor with Reducing Mean Latency for OFDMRozita Teymourzadeh, Yazan Samir Algnabi, Nooshin Mahdavi, Masuri Bin OthmanProblem statement: Fast Fourier Transform (FFT) is widely applied in OFDM trance-receiver communications system. Hence efficient FFT algorithm is always considered. Approach: This study proposed FPGA realization of high resolution high speed low latency floating point adder/subtractor for FFT in OFDM trance-receiver. The design was implemented for 32 bit pipelined adder/subtractor which satisfied IEEE-754 standard for floating-point arithmetic. The design … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 7,924 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Implementation of a Genetic Algorithm Based Canonical Singed Digit Multiplierless Fast Fourier Transform Processor for Multiband Orthogonal Frequency Division Multiplexing Ultra Wideband ApplicationsMahmud Benhamid, Masuri B. OthmanProblem statement: Ultra Wide Band (UWB) technology has attracted many researchers' attention due to its advantages and its great potential for future applications. The physical layer standard of Multi-band Orthogonal Frequency Division Multiplexing (MB-OFDM) UWB system is defined by ECMA International. In this standard, the data sampling rate from the analog-to-digital converter to the physical layer is up to 528 … …Journal of Mathematics and Statistics, Vol. 5, Issue 4 · 31 Dec 2009 · 7,515 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS TechnologySiva Kumar Palaniappan, Tun Zainal Azni ZulkifliThis paper introduces detail design of semi-custom CMOS Fast Fourier Transform (FFT) architecture for computing 16-point radix-4 FFT. FFT is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication application as an important block for various multi-carrier systems such as for WLAN (Wireless local area network). This paper describes … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,164 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA Review on OFDM and PAPR Reduction TechniquesArun Kumar, Manisha GuptaOFDM is a multi carrier transmission technique where a single set of data is transmitted over a number of sub-carrier. OFDM takes the advantage of multi-path propagation and reduces the fading effect. The idea of OFDM is to split the total transmission bandwidth into a number of orthogonal subcarriers which reduces the inter-symbol-interference, power consumption and increases the capacity and … …American Journal of Engineering and Applied Sciences, Vol. 8, Issue 2 · 4 Jun 2015 · 8,394 accessesView PDFCite