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89 articles for “circuit design”
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Research ArticleOpen accessAll words, across the recordSource Couple Logic (SCL): Theory and Physical DesignMohamed Azaga, Masuri OthmanThis study describes and presents the analysis for the Source-Coupled Logic (SCL) inverter as will as the effect of submicron layout parasitics. The SCL inverter circuit model and its operation is defined. The analysis for the SCL is carried from the point of view of input/output voltage characteristics and the effect of noise margin. The inverter gate delay model is … …American Journal of Engineering and Applied Sciences, Vol. 1, Issue 1 · 31 Mar 2008 · 7,466 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordNew Development Design of Low Current Measurement with Noise Reduction for High-Resolution SystemNdalla Essengue Gloire, Wembe Tafo Evariste, Djamet Yimga Arnaud et al.The treatment of inoperable cancers in the therapy terminal in Lanzhou-China, which is located at the Institute of Modern Physics (IMP), permits to work on the actual front-end readout. The availability of detailed noise spectral density characteristics for the OPA amplifier helps to develop the noise error analysis for high-resolution. This work focused on the noise model of the detector-preamplifier, … …American Journal of Engineering and Applied Sciences, Vol. 11, Issue 2 · 18 May 2018 · 8,424 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordAN EFFICIENT CELL PLACEMENT USING GRAVITATIONAL SEARCH ALGORITHMSRose Al Qasem, Taisir EldosIn modern chip design, cell placement is a stage in which cells representing well-defined functions are assigned physical locations, in a way that optimizes the total area and routing length. Cell placement is an NP-complete problem and the exact solution is generally far from reach for a practically sized instance. Hence, diversified heuristic algorithms are used to solve this problem. … …Journal of Computer Science, Vol. 9, Issue 8 · 25 Jun 2013 · 7,371 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordParallel Memetic Algorithm for VLSI Circuit Partitioning Problem using Graphical Processing UnitsP. Subbaraj, P. SivakumarProblem statement: Memetic Algorithm (MA) is a form of population-based hybrid Genetic Algorithm (GA) coupled with an individual learning procedure capable of performing local refinements. Here we used genetic algorithm to explore the search space and simulated annealing as a local search method to exploit the information in the search region for the optimization of VLSI netlist bi-Partitioning problem. However, … …Journal of Computer Science, Vol. 8, Issue 5 · 27 Feb 2012 · 7,090 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordA Wireless Sensor Node Supporting Various Powers Supply and Communication MethodsStefan Gruber, Hannes Reinisch, Hartwig Unterassinger et al.Problem statement: This study presents a wireless sensor node dedicated for in-tire pressure and temperature monitoring. Additional features set it apart from the many different systems available on the highly competitive market. State-of-the-art implementations are mounted on the rim of a tire. Here the sensor node will be mounted on the inner liner of the tire. By moving the sensor … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 4 · 12 Jan 2012 · 8,032 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,677 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordNonlinear Control Design of Shunt Flexible AC Transmission System Devices for Damping Power System OscillationPrechanon KumkratugProblem statement: The disturbance in the complicated network of power system may cause in nonlinear response. Static Synchronous Compensator (STATCOM) is a power electronic based device that has the capability of controlling the line current. This study applies the STATCOM to decrease the over line current in power system during dynamic state. Approach: This study proposes the control strategy of … …Journal of Computer Science, Vol. 7, Issue 6 · 14 Jun 2011 · 6,599 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordNonlinear Control Design of Series FACTS Devices for Damping Power System OscillationPrechanon KumkratugProblem statement: The disturbance in the complicated network of power system may cause in nonlinear response. Static Synchronous Series Compensator (SSSC) is a power electronic based device that has the capability of controlling the line current. This study applies the SSSC to decrease the over line current in power system during dynamic state. Approach: This study proposes the control strategy … …American Journal of Applied Sciences, Vol. 8, Issue 2 · 28 Feb 2011 · 7,329 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordFPGA Based SPWM Bridge InverterM. N. Md Isa, M.I. Ahmad, Sohiful A.Z. Murad, M.K. Md ArshadThis study presents methodology to generate sinusoidal pulse width modulation (SPWM) signal using Field Programmable Gate Array, FPGA technology. We discussed the unipolar switching scheme and the methodology to generate the signal with the predetermined switching frequencies. Simulation on the designed pulses was conducted using Altera Max Plus II simulation tools. This simulation method was used to get the desired … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,396 accessesView PDFCite