Sign inSubmit
Tips: “quotes” for a phrase · author:Lee · a DOI goes straight to its article

73 articles for “Pipeline”

Set a search alert
Also matching:1 special issue
Research ArticleOpen accessIn the abstractDynamically Reconfigurable Embedded Architecture-An Alternative To Application-Specific Digital Signal Processing ArchitecturesN. Ramadass, S. Natarajan, J. Raja Paul PerinbamEmerging trends in design of real-time digital signal processing systems indicate that in the future, a significant amount of performance improvement can be achieved using dynamically reconfigurable embedded architectures consisting of reconfigurable, general-purpose components. Although embedded real-time systems have long been prevailing in our society, no firm scientific base has been established yet to handle timing requirements in a systematic … …Journal of Computer Science, Vol. 3, Issue 10 · 31 Oct 2007 · 6,727 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Novel Reconfigurable Execution Core for Merged DSP MicrocontrollerA. K. Rath, P. K. MeherThe study presents an execution core which can be reconfigured either for calculation of digital convolution or for computation of discrete orthogonal transform by appropriate local buffer initialization of processing cells. It is shown that the data flow pattern can be changed by a single bit control signal. The proposed core can be connected to port 1 of Intel 8051 … …Journal of Computer Science, Vol. 3, Issue 10 · 31 Oct 2007 · 6,483 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Hardware Implementation of High Speed FFT CoreM. Kannan, S. K. SrivatsaApplications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power. This paper proposes the implementation of radix-4 based parallel-pipelined Fast Fourier Transform processor which incorporates a low power commutator, butter-fly with multiplier-less architecture. The proposed parallel pipelined architectures have the advantages of high throughput and low power consumption. The multiplier-less architecture uses shift … …Journal of Computer Science, Vol. 3, Issue 6 · 30 Jun 2007 · 7,227 accessesView PDFCite