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176 results for “power consumption”

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EditorialOpen accessIn the abstractON THE CHALLENGES OF THE USE AND INTEGRATION OF RENEWABLE ENERGY SOURCESMariano MartínOverview: Although renewable energy sources are plentiful, their availability is highly volatile in time and distributed across regions while and the processes that transform them into useful power or chemicals are underdeveloped. In this work we discuss on the scope for the use and integration of renewable energy sources and the future development of the alternatives. Energy, the sources and … …Energy Research Journal, Vol. 5, Issue 1 · 11 Sep 2014 · 7,543 accessesView PDFCite
Research ArticleOpen accessIn the abstractSENSOR NETWORK PERIODICAL DATA ASSEMBLY USING IMBALANCED CLUSTERING ENERGY EFFICIENT MECHANISMK. Munusamy, R. M.S. ParvathiFast technical advances and development in wireless communication resulted in the huge consumption of wireless sensor networks. The nodes in these networks are ready to be sensed, processing the data and transmitting radio units. While several research works have been conducted related to the power-aware and energy-efficiency using Cooperative Networking protocol (CONET) that reforms clusters but the multiple rate remains … …Journal of Computer Science, Vol. 10, Issue 10 · 28 Jun 2014 · 6,654 accessesView PDFCite
Research ArticleOpen accessIn the abstractCOMPARATIVE STUDY ON ENERGY CONSUMPTION IN DYNAMIC WINDOW SECURED IMPLICIT GEOGRAPHIC FORWARDING ROUTING PROTOCOLAbubakar Idris Umar, Zurina Mohd HanapiAn Ideal WSNs should operate with the least possible energy required in order to increase the lifetime of the sensor nodes and at the same time, ensure network connectivity. But the Inherent power limitation makes power-awareness a critical requirement for WSN, this calls for the need to manage energy in sensor nodes. Also In order to ensure successful transmission of … …Journal of Computer Science, Vol. 10, Issue 9 · 9 Apr 2014 · 6,863 accessesView PDFCite
Research ArticleOpen accessIn the abstractCARRY SAVE COMMON MULTIPLICAND MONTGOMERY FOR RSA CRYPTOSYSTEMRupali Verma, Maitreyee Dutta, Renu VigRSA public key cryptosystem provides encryption and digital signatures. With growth of key size an efficient design of RSA in terms of area, frequency, throughput and power consumption is hard to achieve. Also with the different type of attacks possible, a need for secure RSA cryptosystem which is attack resistant has arisen. This study presents RSA design with Montgomery powering … …American Journal of Applied Sciences, Vol. 11, Issue 5 · 8 Mar 2014 · 6,972 accessesView PDFCite
Research ArticleOpen accessIn the abstractPERFORMANCE ANALYSIS OF HIGH EFFICIENT AND LOW POWER ARCHITECTURE FOR FUZZY BASED IMAGE FUSIONS. Anbumozhi, P. S. ManoharanImage fusion based on wavelet transform is the most commonly used image fusion method, which fuses the source images’ information in wavelet domain according to some fusion rules. But because of the uncertainties of the source images’ contributions to the fused image, how to design a good fusion rule to integrate as much information as possible into the fused image … …American Journal of Applied Sciences, Vol. 11, Issue 5 · 21 Feb 2014 · 6,757 accessesView PDFCite
Research ArticleOpen accessIn the abstractNOVEL REVERSIBLE VARIABLE PRECISION MULTIPLIER USING REVERSIBLE LOGIC GATESM. Saravanan, K. Suresh ManicMultipliers play a vital role in digital systems especially in digital processors. There are many algorithms and designs were proposed in the earlier works, but still there is a need and a greater interest in designing a less complex, low power consuming, fastest multipliers. Reversible logic design became the promising technologies gaining greater interest due to less dissipation of heat … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,709 accessesView PDFCite
Research ArticleOpen accessIn the abstractALL OPTICAL IMPLEMENTATION OF HIGH SPEED AND LOW POWER REVERSIBLE FULL ADDER USING SEMICONDUCTOR OPTICAL AMPLIFIER BASED MACH-ZEHNDER INTERFEROMETERR. M. Bommi, S. Selvakumar RajaIn the recent years reversible logic design has promising applications in low power computing, optical computing, quantum computing. VLSI design mainly concentrates on low power logic circuit design. In the present scenario researchers have made implementations of reversible logic gates in optical domain for its low energy consumption and high speed. This study is all about designing a reversible Full … …Journal of Computer Science, Vol. 10, Issue 7 · 12 Feb 2014 · 6,674 accessesView PDFCite
Research ArticleOpen accessIn the abstractREDUCING TRANSMITTED POWER OF MOVING RELAY NODE IN LONG-TERM EVOLUTION-ADVANCED CELLULAR NETWORKSJaafar A. Aldhaibani, A. Yahya, R. B. Ahmad et al.Wireless multi-hop relay networks have become very significant technologies in mobile communications. These networks ensure data rate transfer and coverage extension with a low cost. In this study two types of relay are studied; Fixed Relay Node (FRN) and Moving Relay Node (MRN). Where system analyses for uplink and downlink transmission are derived in this study. Moreover the optimal relay … …Journal of Computer Science, Vol. 10, Issue 6 · 3 Feb 2014 · 6,741 accessesView PDFCite
Research ArticleOpen accessIn the abstractA PARTICLE SWARM OPTIMIZATION APPROACH FOR LOW POWER VERY LARGE SCALE INTEGRATION ROUTINGG. Nallathambi, S. RajaramThis study deals with the particle swarm optimization approach for optimal power dissipation in VLSI interconnect driven routing technique. Interconnect power dissipation is a major challenging research problem in Deep Submicron (DSM) regime that affects the overall circuit performance. The Buffer Insertion Buffer Sizing and Wire Sizing (BISWS) is considered for minimizing the power dissipation in VLSI circuits using interconnect … …Journal of Mathematics and Statistics, Vol. 10, Issue 1 · 1 Feb 2014 · 6,747 accessesView PDFCite
Research ArticleOpen accessIn the abstractPERFORMANCE ANALYSIS OF HIGH EFFICIENCY LOW DENSITY PARITY-CHECK CODE DECODER FOR LOW POWER APPLICATIONSM. Revathy, R. SaravananIn this study, we propose a low power, high efficient Low Density Parity-Check Code (LDPC) Decoder Architecture for error detection and correction applications. LDPC codes have been adopted in latest wireless standards such as satellite and mobile communications since they possess superior error-detecting and correcting capabilities. As technology scales, memory devices become larger and more powerful and low power consumption … …American Journal of Applied Sciences, Vol. 11, Issue 4 · 30 Jan 2014 · 6,888 accessesView PDFCite