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564 articles for “Architect”
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Research ArticleOpen accessIn the abstractMapping UML Component Specifications to JEE ImplementationsJyhjong LinComponent-based Software Engineering (CbSE) has become a well-accepted approach for developing complex software systems due to its significant advantages on composition and reuse. In practice, however, its use still requires the conjunction of a component specification method that describes how system requirements are satisfied in terms of software components. Such a component specification is then implemented in a variety of … …Journal of Computer Science, Vol. 3, Issue 10 · 31 Oct 2007 · 6,478 accessesView PDFCite
Research ArticleOpen accessIn the abstractIF-THEN Adder Application in Online DALUT ImplementationMohamed Al Mahdi Eshtawie, Masuri OthmanThis paper presents the application of a proposed if-then rule based adder in implementing distributed arithmetic online lookup table (DALUT). The online DALUT development and implementation is a continuation of our previous work where we proposed this idea and use it in designing finite impulse (FIR) filter. In our LUT architecture we have been able to overcome the major disadvantage … …American Journal of Applied Sciences, Vol. 4, Issue 9 · 30 Sep 2007 · 6,938 accessesView PDFCite
Research ArticleOpen accessIn the abstractDesign of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS TechnologySiva Kumar Palaniappan, Tun Zainal Azni ZulkifliThis paper introduces detail design of semi-custom CMOS Fast Fourier Transform (FFT) architecture for computing 16-point radix-4 FFT. FFT is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication application as an important block for various multi-carrier systems such as for WLAN (Wireless local area network). This paper describes … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,164 accessesView PDFCite
Research ArticleOpen accessIn the abstractLow Power Hardware Implementation of High Speed FFT CoreM. Kannan, S. K. SrivatsaApplications based on Fast Fourier Transform (FFT) such as signal and image processing require high computational power. This paper proposes the implementation of radix-4 based parallel-pipelined Fast Fourier Transform processor which incorporates a low power commutator, butter-fly with multiplier-less architecture. The proposed parallel pipelined architectures have the advantages of high throughput and low power consumption. The multiplier-less architecture uses shift … …Journal of Computer Science, Vol. 3, Issue 6 · 30 Jun 2007 · 7,227 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Novel Heat Shock Transcription Factor Family in Entamoeba histolyticaConsuelo G. García, Ma. De la Luz Macias Argüelles, D. Guillermo P Ishiwara et al.The HSTF is a master molecule involved in the transcriptional control of several genes during different types of stress. This transcription factor is a very conserved protein identified in different organisms from bacterial to human. Entamoeba histolytica is the protozoan responsible for the human amoebiasis. This parasite is exposed to different kind of stress as changes in the pH, temperature, … …American Journal of Infectious Diseases, Vol. 3, Issue 2 · 30 Jun 2007 · 7,182 accessesView PDFCite
Research ArticleOpen accessIn the abstractTask Load Balancing Strategy for Grid ComputingB. Yagoubi, Y. SlimaniWorkload and resource management are two essential functions provided at the service level of the Grid software infrastructure. To improve the global throughput of these environments, effective and efficient load balancing algorithms are fundamentally important. Most strategies were developed in mind, assuming homogeneous set of resources linked with homogeneous and fast networks. However for computational Grids we must address main … …Journal of Computer Science, Vol. 3, Issue 3 · 31 Mar 2007 · 7,605 accessesView PDFCite
Research ArticleOpen accessIn the abstractPower Consumption and Performance’s Library on DSPs: Case Study MPEG2Jalel Ktari, Mohamed Abid, Nathalie Julien, Johann LaurentThe growing demand for portable electronic devices has led to an increased emphasis on power consumption within the semiconductor industry. As a result, designers are now encouraged to consider the impact of their decisions not only on speed and area, but also on power throughout the design space exploration. This article presents a high-level design space exploration methodology. It allows … …Journal of Computer Science, Vol. 3, Issue 3 · 31 Mar 2007 · 6,827 accessesView PDFCite
Research ArticleOpen accessIn the abstractBuilding an e-Government e-Trust InfrastructureHussein Al- Omari, Ahmed Al- OmariThis paper presents a Trust Model for e-Government implementation. In the first part of the paper, the trust definition from different points of view (psychology, philosophy, linguistic, sociology, and mathematics) was presented. Most people think that to build trust between the government and its customers or citizens, one must start by implementing IT Security and some kinds of Customer Relationship … …American Journal of Applied Sciences, Vol. 3, Issue 11 · 30 Nov 2006 · 7,281 accessesView PDFCite
Research ArticleOpen accessIn the abstractForecasting River Flow in the USA: A Comparison between Auto-Regression and Neural Network Non-Parametric ModelsAbdel K.M. Baareh, Alaa F. Sheta, Khaled A. KhnaifesForecasting a time series became one of the most challenging tasks to variety of data sets. The existence of large number of parameters to be estimated and the effect of uncertainty and outliers in the measurements makes the time series modeling too complicated. Recently, Artificial Neural Network (ANN) became quite successful tool to handle time series modeling problem. This paper … …Journal of Computer Science, Vol. 2, Issue 10 · 31 Oct 2006 · 6,962 accessesView PDFCite
Research ArticleOpen accessIn the abstractStudy of Network on Chip resources allocation for QoS ManagementAbdelhamid HELALI, Adel SOUDANI, Jamila BHAR, Salem NASRIThe increasing complexity of integrated circuits and application requirements drive the research of new on-chip interconnection architectures. A network on chip draws on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. The main goal pursued is to achieve superior bandwidth when compared to conventional on-chip bus architectures. The … …Journal of Computer Science, Vol. 2, Issue 10 · 31 Oct 2006 · 6,307 accessesView PDFCite