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28 results for “Processor design”
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Research ArticleOpen accessIn the abstractVHDL Specification Methodology from High-level SpecificationM. Benmohammed, S. MernizDesign complexity has been increasing exponentially this last decade. In order to cope with such an increase and to keep up designers' productivity, higher level specifications were required. Moreover new synthesis systems, starting with a high level specification, have been developed in order to automate and speed up processor design. This study presents a VHDL specification methodology aimed to extend … …Journal of Computer Science, Vol. 1, Issue 2 · 30 Jun 2005 · 6,937 accessesView PDFCite
Research ArticleOpen accessIn the abstractDevelopment of A Semi-Industrial Multi Fruit Dryer System Using Simultaneous Intelligent ControlMarjan Javanmard, Johari Endan, K. A. Abbas, Farshad ArvinProblem statement: This study presented a semi-industrial fruit dryer machine which is useful to dry different types of fruit. The drying process and its functions are selectable by user to obtain a multi dryer system. Approach: A microcontroller base controller that enables to simultaneous monitoring was utilized. There are two types of sensors as the inputs of system which are … …American Journal of Applied Sciences, Vol. 7, Issue 2 · 28 Feb 2010 · 8,157 accessesView PDFCite
Research ArticleOpen accessIn the abstractA Multi-form Multiple Choice Editor Exam Tool Based on HTML Website and Artificial Intelligence TechniquesA. Rjoub, Y. Eyadat, A. Ghazawi et al.Problem statement: The educators argue that in the post modern world changes in the nature of work, globalization, the information revaluation and today's social challenges will all impact on educational priorities and thus will require a new mode of assessment. Approach: The objectives of this study were to: (1) Present a novel software package tool to create multiple choice and … …Journal of Computer Science, Vol. 5, Issue 6 · 30 Jun 2009 · 7,033 accessesView PDFCite
Research ArticleOpen accessIn the abstractIrregular Class of Multistage Interconnection Network in Parallel ProcessingSandeep Sharma, K. S. Kahlon, P. K. Bansal, Kawaljeet SinghA major problem in designing a large-scale parallel and distributed system was the construction of an Interconnection Network (IN) to provide inter-processor communication. One of the biggest issues in the development of such a system was the development of an effective architecture and algorithms that have high reliability, give good performance (even in the presence of faults), low cost, low … …Journal of Computer Science, Vol. 4, Issue 3 · 31 Mar 2008 · 7,057 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordParallel Memetic Algorithm for VLSI Circuit Partitioning Problem using Graphical Processing UnitsP. Subbaraj, P. SivakumarProblem statement: Memetic Algorithm (MA) is a form of population-based hybrid Genetic Algorithm (GA) coupled with an individual learning procedure capable of performing local refinements. Here we used genetic algorithm to explore the search space and simulated annealing as a local search method to exploit the information in the search region for the optimization of VLSI netlist bi-Partitioning problem. However, … …Journal of Computer Science, Vol. 8, Issue 5 · 27 Feb 2012 · 7,090 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,677 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDFCite
Research ArticleOpen accessAll words, across the recordA Low Cost Design Solution - DSP Based Active Power Factor Corrector for SMPS/ UPS( Single Phase)Samia Pillai Pitchai, B. UmamaheswariAs per international agency regulation (IEC 1000-3-2/EN 61000-3-2) and market expectation, it is important to reduce current harmonics in the AC line current drawn by SMPS/ UPS connected to AC Mains as source and also it is desired by the user to deliver maximum power output by achieving unity power factor. To achieve the above objectives in SMPS/ UPS, APFC … …American Journal of Applied Sciences, Vol. 3, Issue 1 · 31 Jan 2006 · 6,896 accessesView PDFCite