Research ArticleOpen accessIn the abstractDesign of a Merged DSP Microcontroller for Embedded Systems using Discrete Orthogonal TransformA. K. Rath, P. K. MeherIn this paper we have proposed the design of a DSP microcontroller where the processor load is significantly reduced by relegating the math-intensive DSP algorithm to dedicated transform computing modules. It is shown that the use of such transform modules will facilitate scalability, reusability and flexibility for implementation of wide varieties of DSP functionalities. Moreover, it would be possible to … …Journal of Computer Science, Vol. 2, Issue 5 · 31 Aug 2006 · 6,918 accessesView PDFCite
Research ArticleOpen accessIn the abstractAn Online Website for Tutoring and E-Examination of Economic CourseIbrahiem M.M. EL Emary, Jihad A.A. Abu Al SondosThis study aimed to present a novel software tool can be used for online examination and tutorial application of the syllabus of economic course. Also, among the main interests of this paper is to produce a software through it we make sure that students have studied all the concepts of economics. So, the proposed software is structured from two major … …American Journal of Applied Sciences, Vol. 3, Issue 2 · 28 Feb 2006 · 6,804 accessesView PDFCite
Research ArticleOpen accessIn the abstractCommunication Architecture Synthesis for Multi-bus SoCAbdelkrim Zitouni, Sami Badrouchi, Rached TourkiIn the systems on chip (SoC) design, the synthesis of communication architecture constitutes the bottleneck which can affect the performances of the system. Various schemes and protocols can be necessary, just as various topologies of interconnection. To reduce the complexity of the communications refinement, we present in this study a model and a synthesis approach for multi-bus communication architecture containing … …Journal of Computer Science, Vol. 2, Issue 1 · 31 Jan 2006 · 6,780 accessesView PDFCite
Research ArticleOpen accessIn the abstractAsynchronous NoC Router DesignSami Badrouchi, Abdelkrim Zitouni, Kholdoun Torki, Rached TourkiThe Quality of Service Network on Chip (QNoC) is the most perferment solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents an asynchronous NoC router, for use in 2-D mesh-connected networks. It comprises multiple interconnected input and output ports and dynamic arbitration mechanisms that resolve any output port conflicts based on the … …Journal of Computer Science, Vol. 1, Issue 3 · 30 Sep 2005 · 7,414 accessesView PDFCite