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129 articles for “signal processing”
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Research ArticleOpen accessIn the keywordsLow Cost Smart Sensor DesignTakialddin A. Al SmadiProblem statement: Sensor with local processing power that enables it to react to local conditions without having to refer back to the central controller. The size and the cost of smart sensor circuit have been reduced. Approach: The use of microcontroller, such as (PIC16C715), with an 8-bit ADC (Analogue to Digital Converter) in one chip. This reduction in the circuit … …American Journal of Engineering and Applied Sciences, Vol. 4, Issue 1 · 11 Feb 2016 · 7,574 accessesView PDFCite
Research ArticleOpen accessIn the keywordsVLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select AdderS. Karunakaran, N. KasthuriRecent advances in mobile computing and multimedia applications demand high-performance and low-power VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a programmable digital Finite Impulse … …American Journal of Applied Sciences, Vol. 9, Issue 12 · 5 Jan 2013 · 7,179 accessesView PDFCite
Research ArticleOpen accessIn the keywordsField Programmable Gate Arrays based Design, Implementation and Delay Study of Braun's MultipliersMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Parallel array multipliers are required to achieve high execution speed for Digital Signal Processing (DSP) applications. Approach: The purpose of this article is to investigate Field Programmable Gate Arrays (FPGAs) implementation of standard Braun’s multipliers on Spartan-3AN, Virtex-2, Virtex-4 and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using … …Journal of Computer Science, Vol. 7, Issue 12 · 22 Oct 2011 · 6,677 accessesView PDFCite
Research ArticleOpen accessIn the keywordsBraun's Multipliers: Spartan-3AN based Design and ImplementationMuhammad H. Rais, Mohammed H. Al MijalliProblem statement: Multiplication is an essential airthematic operation for common Digital Signal Processing (DSP) applications, such as filtering and Fast Fourier Transform (FFT). To achieve high execution speed, parallel array multipliers are widely used. Approach: The field Programmable Gate Arrays (FPGAs) is currently the dominant and viable technology that could be implemented and reconfigured at the same time. Results: The … …Journal of Computer Science, Vol. 7, Issue 11 · 18 Aug 2011 · 6,909 accessesView PDFCite
Research ArticleOpen accessIn the keywordsBio-Potential Signal Extraction from Multi-Channel Paper Recorded ChartsAli S.A. Al-MejradProblem Statement: Almost all of the modern biomedical equipments that record the biopotential actions have digital output but the paper chart records are a must. The volume of these records is significant and increasing rapidly. Keeping a bio-signal chart of a patient make it easy for quick assessment but still create problems in the essence of data storage, archiving , … …American Journal of Applied Sciences, Vol. 8, Issue 6 · 13 Jun 2011 · 7,106 accessesView PDFCite
Research ArticleOpen accessIn the keywordsA Novel Technique for Extraction Foetal Electrocardiogram using Adaptive Filtering and Simple Genetic AlgorithmMahmoud Ahmed Suliman Ali, XiaoPing ZengProblem statement: Foetal electrocardiogram (FECG) was the best method used to diagnose Foetal heart problem. Knowledge of the foetal heart signal prevents Foetal problems in the earlier stage. Recently, there has been a growing interest in noninvasive method rather than the old invasive method which was more risky for the mother's health. The most significant problem in noninvasive method is … …Current Research in Biostatistics, Vol. 1, Issue 2 · 31 Dec 2010 · 10,407 accessesView PDFCite
Research ArticleOpen accessIn the keywordsHardware Implementation of Truncated Multipliers Using Spartan-3AN, Virtex-4 and Virtex-5 FPGA DevicesMuhammad H. RaisProblem statement: The development cost for Application Specific Integrated Circuits (ASICs) are high, algorithms should be verified and optimized before implementation. The Digital Signal Processing (DSP), image processing and multimedia requires extensive use of multiplication. The truncated multipliers can easily be implemented using Field Programmable Gate Array (FPGA) devices. Approach: This research presented the comparative study of Spartan-3AN, Virtex-4 and … …American Journal of Engineering and Applied Sciences, Vol. 3, Issue 1 · 31 Mar 2010 · 8,334 accessesView PDFCite
Research ArticleOpen accessIn the keywordsAnalysis of Speech Processing Strategies in Cochlear ImplantsKouachi Rouiha, Djedou Bachir, Bouchaala AliCochlear implants can restore partial hearing to profoundly deaf people; the main function of these prostheses is to electrically stimulate the auditory nerve using an electrode array inserted in the cochlea. The acoustic signal is picked up by a microphone and analyzed. Then the extracted parameters of the signal are coded to generate electrical signals reconstituting the original signal. Currently … …Journal of Computer Science, Vol. 4, Issue 5 · 31 May 2008 · 6,839 accessesView PDFCite
Research ArticleOpen accessIn the keywordsDesign of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS TechnologySiva Kumar Palaniappan, Tun Zainal Azni ZulkifliThis paper introduces detail design of semi-custom CMOS Fast Fourier Transform (FFT) architecture for computing 16-point radix-4 FFT. FFT is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication application as an important block for various multi-carrier systems such as for WLAN (Wireless local area network). This paper describes … …American Journal of Applied Sciences, Vol. 4, Issue 8 · 31 Aug 2007 · 7,164 accessesView PDFCite
Research ArticleOpen accessIn the keywordsSoftware-based Control Algorithm for Providing Convergence Region with an Increasing Polynomial under Windowed FIR FiltersSergio Bimbi Junior, Vitor Chaves De Oliveira, Agenor De Toledo Fleury, Ronaldo RuasThis work developed a control algorithm for dynamical systems to high performance manner, in a way to produce an optimum output applying a modification in digital filters, capable of increasing the convergence zone within the desired cut -off frequency. Such task focused on consistently improving the challenge present in digital filters, which are time-invariant linear systems that are able to … …Journal of Computer Science, Vol. 14, Issue 7 · 17 Jul 2018 · 8,408 accessesView PDFCite