Comparative Power Analysis of Precomputation Based Content Addressable Memory

Problem statement: In this study we discus about Signature Detection Technique (SDT) used in Network Intrusion Detection System (NIDS). Design of SDT using Content Addressable Memory (CAM) is discussed. Approach: Two novel architectures, XOR and ones count based Pre computation CAM architectures are proposed and implemented in third party back end tool with 0.18 mm technology, power consumptions are compared. Results: Proposed architecture consumes 90% less power added with 5.2% increment in speed. Conclusion: Power reduction was achieved by reducing the number of bit comparisons of pre computation technique.