Fabrication of Single Layer SiO₂ and Si₃N₄ as Antireflection Coating on Silicon Solar Cell Using Silvaco Software

The main objectives was to investigate and enhance the short circuit current density, J_sc and also to improve the efficiency of silicon solar cell by fabricating a layer of silicon dioxide (SiO₂) and silicon nitride (Si₃N₄) coatings on silicon solar cell. This fabrication carried out on high temperature during annealing process from 800-1050°C and variable thickness of antireflection coating (ARC) layer from 50-90 nm thick. The photovoltaic properties of Si₃N₄ layer have been compared with SiO₂ layer to determine which material is suitable in fabricating single layer ARC. Solar cell simulation could be useful for time saving and cost consumption. Problem statement: The Silvaco software is not widely used in designing the 2D solar cell devices because there are lots of 1D, 2D and 3Dsimulation beside Silvaco software such as MicroTec, SCAPS-1D. Approach: The silicon dioxide (SiO₂) and silicon nitride (Si₃N₄) coating have been modeled and fabricated on silicon solar cell by using Silvaco software packaging. Results: For SiO₂ results, the FF value is approximately 0.758 and η maximum 9.43%. In annealing process, the temperature becomes higher resulted increasing of pn junction depth. However, not to V_oc and J_sc values, both parameters were slowly decreased when temperature increased. Meanwhile, when the thickness of SiO₂ layer is increased, the parameters of pn junction depth, J_sc, V_oc, FF and η were decreased slowly. As for Si₃N₄ result, the calculated FF approximately 0.758 and h maximum is 9.57%. During annealing process, the temperature increasing constantly follows the increasing of pn junction depth and J_sc, meanwhile the V_oc is decreased slowly. In variable Si₃N₄ thickness simulation, the output parameters of pn junction depth, J_sc, V_oc, FF and η were decreased when the thickness increased 10 nm each simulation. Conclusion: The optimum temperature during annealing process for SiO₂ is 950°C, while for Si₃N₄ is 1050°C. For the thickness analysis, the optimum ARC thickness for SiO₂ and Si₃N₄ layer is 50 nm both.